I'm having dificulties to code a task switcher using TSS. The problem is after the execution of the jmp far TSS:0 instruction. Does anybody know a good tutorial explaining the timer (irq) handler, and what should I do to return to it after the jmp instruction?
Thanx...
Task Switching
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pepito
RE:Task Switching
First, what kind of problem you have after the execution of the jump?
The use of TSS require to be careful with all the details explained in the "Intel Architecture Software Developer’s Manual, Volume 3", I recommend you take time to read it step-by-step.
In relation to the IRQ timer check it:
Have an IDT entry and an ISR for the timer interrupt (IRQ-0). The ISR must have an acknowledge to the PIC-1, look the code:
isr_timer:
; You can print some characters here to test the ISR...
mov al, 0x20 ; ACK
out 0x20, al ; PIC-1
iretd
You need to unmask the bit-0 of PIC-1 to enable IRQ0, you can do it using the next code:
in al, 0x21
and al, 11111110b
out 0x21, al
Optionally, you can change the frequency of the 8253 timer chip (PIT) using the ports 0x40-0x43. You can find information about how to do it at:
http://www.nondot.org/sabre/os/articles ... usDevices/
It is important to know that the PIT have 3 different chanels but just the first cause a hardware interrupt (IRQ0).
pepito
The use of TSS require to be careful with all the details explained in the "Intel Architecture Software Developer’s Manual, Volume 3", I recommend you take time to read it step-by-step.
In relation to the IRQ timer check it:
Have an IDT entry and an ISR for the timer interrupt (IRQ-0). The ISR must have an acknowledge to the PIC-1, look the code:
isr_timer:
; You can print some characters here to test the ISR...
mov al, 0x20 ; ACK
out 0x20, al ; PIC-1
iretd
You need to unmask the bit-0 of PIC-1 to enable IRQ0, you can do it using the next code:
in al, 0x21
and al, 11111110b
out 0x21, al
Optionally, you can change the frequency of the 8253 timer chip (PIT) using the ports 0x40-0x43. You can find information about how to do it at:
http://www.nondot.org/sabre/os/articles ... usDevices/
It is important to know that the PIT have 3 different chanels but just the first cause a hardware interrupt (IRQ0).
pepito