Exception handling
Posted: Wed Oct 01, 2003 3:16 pm
I'll be brief (but I'm not tired this time, so I'll be descriptive too). I have a small kernel with a working IDT (e.g. interrupts I call from the kernel fire the ISR and return to where they're supposed to). I don't have problems with exceptions now, but I want to build in exception error code support into the ISRs now, so I don't have to screw with them later (except tweaking and refining, of course).
My understanding of error codes is that they are 32 bit values at the top of the stack when the ISR is accessed, and they are only pushed for interrupts 8 and 10-14. So, if my standard, working, ISR looks like this (with no error handling):
(Where int_master is a C function int_master(int interrupt)). However with error code handling, it would look like this:
Where int_master is now int_master(int errorcode, int interrupt) and %2 is the second argument of the macro creating the ISRs, which is 1 for and exception w/error code and 0 for any other interrupt/exception. The nop if there is no error code is to keep the lengths of the ISRs the same as the function I use to fill the IDT with the addresses of all the ISRs relies on their uniform length. If there is no error code, the trash ecx value can be accepted as the error code argument of int_master will be ignored.
Is this a correct understanding?
My understanding of error codes is that they are 32 bit values at the top of the stack when the ISR is accessed, and they are only pushed for interrupts 8 and 10-14. So, if my standard, working, ISR looks like this (with no error handling):
Code: Select all
isr%1:
pusha
push gs
push fs
push ds
push es
push dword %1
call int_master
add esp, 4
pop es
pop ds
pop fs
pop gs
popa
iret
endisr%1:
Code: Select all
isr%1:
%if %2 = 1
pop ecx
%else
nop
%endif
pusha
push gs
push fs
push ds
push es
push ecx
push dword %1
call int_master
add esp, 8
pop es
pop ds
pop fs
pop gs
popa
iret
endisr%1:
Is this a correct understanding?