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Hello all,

This is my first post but I have been reading here a lot. I am having an issue with BareMetal OS. The part that is giving me issues is in kernel64.asm here is the code that will cause it to spew binary across the screen and eventually to a blank screen and locked up.
; Set up the stack
shl rax, 21 ; Shift left 21 bits for a 2 MiB stack
add rax, [os_StackBase] ; The stack decrements when you "push", start at 2 MiB in
sub rax, 8
mov rsp, rax
Now I am sure that this is not an issue for most as I have ran the code on an older dual core hyperthreaded cpu and the OS runs exactly as it is designed. My problem only happens on an I7 5820K and it is overclocked as well. The motherboard is an ASUS X99-A. I have lowered the cpu speed to below stock settings and also disabled all but 2 cores with and without hyper threading. The mov rsp, rax is the line that if I comment it out that the OS will boot to the cmd line interface. Also if I do a dir on cmd line I will get a green screen. I am convinced that the issue is related to the CPU or the MOBO.

I had located another issue and solved it if anyone else is running an overclocked CPU. In smp.asm 1 line before the wait3 label is a value to loop and wait for the cpu to stabilize after turning on a core. I changed the line of code to this: add rax, 200. I think it was 20 before. Before this change, BMOS would boot with a different core count every time. The CPU was not reporting back to the code that it was able to lock the core, therefore BMOS was not seeing it as an active core.

Any help or ideas are welcome. I have been fighting this issue for over a week now.

Thanks
Tim

Not even an idea where to look?

It is actually quite confusing to understand what you are asking. There is also a lot of code / info missing.

The main question is why does a mov rsp, rax cause the os to crash? Even is rax is not a valid address, is should not be used yet. Also, why does it work on an I5 and not on an I7?

-Tim

Hi,

TimMilliken wrote: Also, why does it work on an I5 and not on an I7?

I'd be tempted to assume it has nothing to do with differences between CPUs and everything to do with differences between physical memory maps.


Cheers,

Brendan

Brendan wrote:Hi,

TimMilliken wrote: Also, why does it work on an I5 and not on an I7?

I'd be tempted to assume it has nothing to do with differences between CPUs and everything to do with differences between physical memory maps.


Cheers,

Brendan

This is the I7 section 5.2.1 http://www.intel.com/content/dam/www/pu ... asheet.pdf
and it matches the I5 here http://www.intel.com/content/www/us/en/ ... vol-2.html section 5.2.1
Unless you was referring to something else? I am new to low level OS programming, but I do have a strong background in embedded low level programming.
Thanks for the idea, and pls correct me if I am wrong!

-Tim

TimMilliken wrote:Unless you was referring to something else?

Even though the CPUs have the same address map capabilities, they are configured differently by the BIOSes of the two motherboards. This means addresses that refer to RAM on one machine could refer to something else on another machine.

Octocontrabass wrote:

TimMilliken wrote:Unless you was referring to something else?

Even though the CPUs have the same address map capabilities, they are configured differently by the BIOSes of the two motherboards. This means addresses that refer to RAM on one machine could refer to something else on another machine.

Understood now. I built a VMware image to test his OS with and found that ram amt makes or breaks his code. With 16 cores, I must have 62gb of ram then all works fine. 64gb causes endless page faults, 32gb gives various errors. While I really want to fix his os and use it for my task, I am afraid I will have to start from scratch and make a purpose built os.

Look to see many more questions from me in the future. lol

-Tim