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 Post subject: Switching from real mode to long mode directly..
PostPosted: Sun Nov 13, 2005 8:02 pm 
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Hi,

I've been playing with long mode, and just thought I'd let you all know that it is possible to go from real mode to long mode without any protected mode code (and without doing most of the things that the AMD manual says).

The algorithm I'm using is (starting from real mode with interrupts disabled):

1) Build paging structures (PML4, PDPT, PD and PTs)
2) Enable PAE in CR4
3) Set CR3 so it points to the PML4
4) Enable long mode in the EFER MSR
5) Enable paging and protected mode at the same time (activate long mode)
6) Load a GDT
7) Do a "far jump" to some 64 bit code

I've tested this code on a (very generously donated) 2.8 GHz Intel Celeron and Bochs, and it works fine on both.

For anyone interested I've put code and a bootable demo on my web site.

For the code itself, see:
http://bcos.hopto.org/temp/init.html

For a bootable floppy image, see:
http://bcos.hopto.org/temp/floppy144.img

And for a screenshot of what it should look like if it works, see:
http://bcos.hopto.org/temp/test64.jpg

If you boot the floppy image on a computer that does support long mode you should end up with vertical stripes down the screen, with some text underneath. If long mode isn't supported it'll lock up after saying something like "Starting 32 bit (or 36 bit) Kernel Setup Code".

I'm hoping this will save people the hassle of loading protected mode segments, a protected mode GDT, IDT, stack, etc - it all seems unnecessary.


Cheers,

Brendan

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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Sun Nov 13, 2005 11:14 pm 
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Would anybody mind testing this on an AMD64 box as well? I believe it to be true, yet I would like certainty and I don't have money for one of my own.


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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Sun Nov 13, 2005 11:46 pm 
I ran it on my desktop (AMD Athlon64 3000+) and it does work.


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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 1:47 am 
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AR wrote:
I ran it on my desktop (AMD Athlon64 3000+) and it does work.


OK, I'm hereby surprised :). Why does AMD document it as such if it is completely superfluous?

I'm off rebuilding my boot loader to not chain-chain load.


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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 7:21 am 
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Hi,

AR wrote:
I ran it on my desktop (AMD Athlon64 3000+) and it does work.


Thanks AR - I was hoping it'd work on AMD too! :)

Candy wrote:
OK, I'm hereby surprised :). Why does AMD document it as such if it is completely superfluous?


I think this may have something to do with NMI's. For example, an NMI immediately after step 5 would cause my code to crash.

IMHO this is fair - the chance of getting an NMI after activating long mode but before loading a 64 bit IDT is extremely small. If the OS crashes very early during boot (e.g. before file systems are started) no data will be lost anyway.

Of course I will be adding a 64 bit IDT soon (once I figure out what happens with the stack and the IST table, and decide how many CPL=0 stacks I want to use).


Cheers,

Brendan

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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 7:48 am 
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AR wrote:
I ran it on my desktop (AMD Athlon64 3000+) and it does work.


is that the earliest release of AMD64 ? maybe they managed to find a way to allow longmode to be enabled right from the start on a next revision of the chip ...

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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 9:04 am 
Yes, works on AMD Athlon 64 3000+, Venice core, socket 939, bought a week ago.


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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 10:01 am 
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i have re-checked the latest revision of the docs, and it appear they still claim "minimal pmode environment is required to setup longmode".

Btw, i fail to see anything that would indeed require protected mode. The demonstration code they have in the specs even use 16 bits protected mode to do the stuff, unless rdmsr or wrmsr require protected mode to run ...

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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Mon Nov 14, 2005 11:42 am 
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Hi,

Pype.Clicker wrote:
Btw, i fail to see anything that would indeed require protected mode. The demonstration code they have in the specs even use 16 bits protected mode to do the stuff, unless rdmsr or wrmsr require protected mode to run ...


RDMSR and RWMSR should work fine in real mode or protected mode with CPL=0 (if CPL=3 you get a GPF).

Out of curiousity I've created a topic on the "AMD64 Architecture" forum on AMD's own web site (http://devforums.amd.com/index.php?showtopic=371), asking if the manual is wrong.

If I get any useful replies I'll forward information back to this forum. I'm hoping someone who works for AMD might be able to explain why the manual says protected mode is needed, or alternatively confirm that it definately isn't needed.


Cheers,

Brendan

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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Tue Feb 21, 2006 7:14 am 
Brendan wrote:
I think this may have something to do with NMI's. For example, an NMI immediately after step 5 would cause my code to crash.


Isn't that the case with AMD's sample code as well? Since they do:

1) Enable paging to activate long mode (set CR0.PG=1)

2) Do the jump to 64-bit code

3) mov rsp, stack0_linear

4) lgdt [pGDT64_linear]

5) lidt [pIDT64_linear]

If I read everything correctly any NMI at points 3 or 4 or before finishing 5 will use a 32-bit IDT which according to the comments at stap 5 is a serious problem.

Why not simply disable NMI's for the time being? Which according to a book I have here is done like so:

mov al, 80h
out 70h, al ; disable NMI's

.... do the jump to long mode etc.

mov al, 0
out 70h, al ; enable NMI's

I checked the AMD thread. Unfortunately no response from any AMD technicians. Have you tried posting the same question to the intel forums?


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 Post subject: Re:Switching from real mode to long mode directly..
PostPosted: Tue Feb 21, 2006 8:52 am 
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Hi,

Rob wrote:
Brendan wrote:
I think this may have something to do with NMI's. For example, an NMI immediately after step 5 would cause my code to crash.


Isn't that the case with AMD's sample code as well? Since they do:


Yes :)

Rob wrote:
Why not simply disable NMI's for the time being? Which according to a book I have here is done like so:


NMI is used for hardware failures (e.g. RAM parity error). If there's a hardware failure during initialization then (IMHO) the most appropriate action would be to shutdown or reset the CPU (as displaying information on the screen isn't possible half-way through a CPU mode switch). This is what would happen if the NMI is left enabled (triple fault). If NMI is disabled, then ignored hardware errors could lead to unpredictable problems later on.

Rob wrote:
I checked the AMD thread. Unfortunately no response from any AMD technicians. Have you tried posting the same question to the intel forums?


I've come to the conclusion that AMD's "AMD Architecture Programer's Manual Volume 2: System Programming" is wrong. It contradicts earlier AMD documentation and "real world" testing. :)


Cheers,

Brendan

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 Post subject:
PostPosted: Wed Jun 13, 2007 8:18 pm 
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The links doesnt seem to work anymore, would it be possible to optain the code otherwise?


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 Post subject:
PostPosted: Wed Jun 13, 2007 8:21 pm 
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Zacariaz wrote:
The links doesnt seem to work anymore, would it be possible to optain the code otherwise?

You should have made a print out of it. 8) It's around here somewhere...

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 Post subject:
PostPosted: Wed Jun 13, 2007 8:40 pm 
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well i didnt know about it when the links worked...
"around here somwhere" do you mean at osdev.org?


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 Post subject:
PostPosted: Wed Jun 13, 2007 8:44 pm 
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Zacariaz wrote:
well i didnt know about it when the links worked...

I've been lurking around here for about 3 years or so...
Zacariaz wrote:
"around here somwhere" do you mean at osdev.org?

:D No...Sadly..I mean in this pile of print outs I have that are completely unsorted...

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