nullplan wrote:
Cyao wrote:
But in some architectures like riscv there isn't any intterupts,
Yeah, I highly doubt that. Small amount of research showed me that RISC-V does indeed have interrupt handling. Anything else would have been extremely weird. Now, there is only a single architectural interrupt handler, but all that means is that you need an interrupt controller, and you need to ask it who actually caused the interrupt.
Without interrupts you would have to poll for everything, that is true. Which is why every CPU since the 6502 at least has had them. You couldn't even sleep the CPU without interrupts, but would have to run it at 100% the whole time. That will be hell on the thermals and on power consumption. And that is why no CPU will ever come without interrupts.
Many microcontrollers operate quite well without interrupts. You have a main loop that polls all the relevant hardware and that handles relevant changes. This provides known response times and you are always certain that things will work. Of course, you would not want to run an operating system this way, or any task with some complexity, but for simple tasks, it works well.
There is another set of much more complicated hardware that process things in parallel rather than in sequence (FPGAs), and then you don't need interrupts either. The drawback of this is that you need to define with Verilog or VHDL exactly what the hardware should do and then configure the FPGA with this. However, FPGAs can deliver 1,000 G multiply-add operations per second, something that is quite impossible to achieve with any CPU, even multicore versions.
There is also a mixture of FPGA and sequential programming by adding processor cores to an FPGA that can interact with dedicated hardware. The processor core could use interrupts from the FPGA hardware design, but the FPGA would work in parallel without interrupts.
Going a step further, you could plug an FPGA into an PCIe slot in your PC, and then use interrupts from the FPGA in you operating system driver.