fpissarra wrote:
You are right about the instruction `mov ds,eax` not existing in the official ISA from Intel, but `mov ds,rax` does.
It's there, but they did a poor job of explaining it. On the page for MOV, the "mov Sreg, r/m16" syntax is marked with **, which is explained as:
"** In 32-bit mode, the assembler may insert the 16-bit operand-size prefix with this instruction"
That implies that without the operand-size prefix, the equivalent is "mov Sreg, r/m32". Normally they would put such an example in the table, and the opcodes would make it clear that "mov ds, ax" in 16-bit mode is the same opcode as "mov ds, eax" in 32-bit mode, as is the case for many 16-bit/32-bit instructions.