ITchimp wrote:
what is wrong with [sp+2] expression?
32-bit memory operands are really convenient. They work like this:
[ base + (index * scale) + displacement ]
"Base" may be EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, or nothing.
"Index" may be EAX, ECX, EDX, EBX, EBP, ESI, EDI, or nothing (but it can't be ESP).
"Scale" may be 1, 2, 4, or 8.
"Displacement" may be any 32-bit integer, including zero.
Additionally, if "base" is ESP or EBP, the default segment is SS instead of DS.
16-bit memory operands are a lot less convenient. They work like this:
[ base + index + displacement ]
"Base" may be BX, BP, or nothing.
"Index" may be SI, DI, or nothing.
"Displacement" may be any 16-bit integer, including zero.
Additionally, if "base" is BP, the default segment is SS instead of DS.
Since SP is not allowed to be the base or index in a 16-bit memory operand, you have two choices: use a different register, or use a 32-bit memory operand.
I wouldn't recommend using a 32-bit memory operand. In real mode, an effective address that doesn't fit within 16 bits will cause an exception, so you need extra code to make a 32-bit memory operand work. Since you're writing a bootloader, you may not have space for that extra code.