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 Post subject: getting APIC info through PCI access ?
PostPosted: Tue Jan 01, 2019 4:33 am 
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Joined: Tue Jan 01, 2019 4:27 am
Posts: 2
I found the following code in linux source file :
Code:

   if (cpu_has_apic && c->x86 > 0x16) {
      set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
   } else if (cpu_has_apic && c->x86 >= 0xf) {
      /* check CPU config space for extended APIC ID */
      unsigned int val;
      val = read_pci_config(0, 24, 0, 0x68);
      if ((val & ((1 << 17) | (1 << 18))) == ((1 << 17) | (1 << 18)))
         set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
   }

this code is from file arch/x86/kernel/cpu/amd.c at linux source code tree.

to anyone not familiar this part of code, c->x86 is the family number of processor. so the code runs to 'else if' part when it is an AMD K8 family processor.

but I can't understand the function call:
read_pci_config(0, 24, 0, 0x68);

what is this device at bus 0, slot 24, function 0 ? According to the code, it seems it is accessing the APIC through pci bus, how is it possible ? I can't find any specification defined these magic numbers, I can't find it is defined in linux code neither.


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 Post subject: Re: getting APIC info through PCI access ?
PostPosted: Tue Jan 01, 2019 4:20 pm 
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Joined: Mon Mar 25, 2013 7:01 pm
Posts: 1636
soloser wrote:
According to the code, it seems it is accessing the APIC through pci bus, how is it possible ?

The PCI controller is partly or completely integrated into the CPU. Since the PCI controller is integrated, it can be used to address other integrated devices as if they were PCI devices.

soloser wrote:
I can't find any specification defined these magic numbers,

Check here. It's described in all of the BKDGs (except Family 17h, which doesn't appear to have a BKDG available).


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 Post subject: Re: getting APIC info through PCI access ?
PostPosted: Wed Jan 02, 2019 4:07 am 
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Joined: Tue Jan 01, 2019 4:27 am
Posts: 2
Octocontrabass wrote:
soloser wrote:
According to the code, it seems it is accessing the APIC through pci bus, how is it possible ?

The PCI controller is partly or completely integrated into the CPU. Since the PCI controller is integrated, it can be used to address other integrated devices as if they were PCI devices.

soloser wrote:
I can't find any specification defined these magic numbers,

Check here. It's described in all of the BKDGs (except Family 17h, which doesn't appear to have a BKDG available).



yes ! I found it, the bus 0, device 0x18 is CPU it self.
thank you !


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