SpyderTL wrote:I don't think there is any way to encode a 16-bit address or SIB register in 64-bit mode, so you couldn't even test it.
It becomes even more interesting
I just compared two versions of Intel's manuals, one from 30.08.13 and second 30.07.14 (roughly a year later). And first tells us:
3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a static value or through an address
computation made up of one or more of the following components:
• Displacement — An 8-bit, 16-bit, or 32-bit value.
• Base — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Index — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Scale factor —A value of 2, 4, or 8 that is multiplied by the index value.
While the second:
3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a static value or through an address
computation made up of one or more of the following components:
• Displacement — An 8-bit, 16-bit, or 32-bit value.
• Base — The value in a 64-bit general-purpose register.
• Index — The value in a 64-bit general-purpose register.
• Scale factor —A value of 2, 4, or 8 that is multiplied by the index value.
Here we see, that Intel's writers actually had the mistake - they assumed that REX.W prefix should tell the processor not only about operand size, but also about the indirect addressing register size (and it in fact seems to agree with plain logic - register values here are actually just data, that is used to calculate address). But in the next edition the REX.W prefix is not mentioned any more and the only possible indirect addressing base and index register bit number now is 64. Does it mean that even 67h prefix doesn't work any more? Or more correctly - there is no guaranty, that it will always work.
So, the Intel's manuals are not very clear and even can change some important declarations as the time passes.