X86 Interrupt descriptor table (IDT) for exceptions and GDT for segments are set properly. I am not using paging and it’s in Protected mode when I set DR registers.
Per Intel manual (System Programming Guide 1– Chapter- 16) , if I set DR0 to DR3 with 4 addresses and enable them using DR6 , then HW breakpoint should work. I referred LINUX source (version 2.6.37.3) for files Hw_breakpoint.c which also does same thing.
I tried ACCESS and EXECUTE breakpoint one by one but none is working. Below is the given source which writes into Debug Registers.
Code: Select all
// These address reference to valid function address in my source code.
void Setx86DebugReg(void)
{
unsigned int dr0=0xfffe0b9e, dr1=0xfffe02dc, dr2=0xfffe0300, dr3 =0xfffe053c;
unsigned int dr7=0x000007ff; // or 0x4aa or 0x7aa or 0x6aa -> also not working
asm volatile ("movl %%eax, %%dr0":: "a"(dr0));
asm volatile ("movl %%eax, %%dr1":: "a"(dr1));
asm volatile ("movl %%eax, %%dr2":: "a"(dr2));
asm volatile ("movl %%eax, %%dr3":: "a"(dr3));
asm volatile ("movl %%eax, %%dr7":: "a"(dr7));
return;
}
After call to Setx86DebugReg() function, i should be able to hit breakpoint, which is not happening.


