tom9876543 wrote:
That would be completely different to x86, and I think that recursive page mapping would not work with PowerPC.
That's right. And page faults play a different role on PPC because you don't point the CPU to the complete mapping, but as you said just to a hash table of it (some models also have an option to use a small set of registers that specify the mapping for a contiguous memory range; so that works somewhat like MTRRs on x86). Another difference is that exception handlers are called in Real Addressing Mode, which would be described as paging turned off on x86.
So yes, different architectures are different, pose different problems and provide different solutions. I haven't written a memory manager on PPC, but I suspect that something like recursive mapping (i.e. some magic that maps all MMU related information to contiguous effective addresses (which x86 people would call virtual addresses)) would be a lot less useful there than it is on x86.