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Ternary move instructions https://forum.osdev.org/viewtopic.php?f=13&t=56776 |
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Author: | linguofreak [ Sat Mar 11, 2023 4:06 am ] |
Post subject: | Ternary move instructions |
Is anyone aware of any ISA that implements the ternary conditional operator as an instruction? Basically, this would be a three operand instruction: MOVcc x, y, z That tests some condition, and moves x to z if the condition is true, and y to z if the condition is false? Of course, conditional branches could be regarded as a special case of this: jne offset could be regarded as equivalent to something like the following in an ISA with a ternary move: movne IP+offset, IP, IP But I'm not aware of any ISA that has a more general implementation of this concept. |
Author: | nullplan [ Sat Mar 11, 2023 6:38 am ] |
Post subject: | Re: Ternary move instructions |
So my first thought was "if any, it would be ARM". Not quite, but ARM has a two-operand move instruction and allows you to put conditions on all instructions, so you could Code: MOVScc Rx, Ry where cc and ncc are opposite conditions.MOVSncc Rx, Rz Come to think of it, you could do the same with CMOV in x86 as well. |
Author: | Octocontrabass [ Sat Mar 11, 2023 3:13 pm ] |
Post subject: | Re: Ternary move instructions |
Do AVX V(P)BLEND instructions count? |
Author: | alexfru [ Sat Mar 11, 2023 9:59 pm ] |
Post subject: | Re: Ternary move instructions |
The traditional MIPS ISA has a few conditional moves:
EDIT to add: MIPS Release 6 has these instead:
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Author: | t3 [ Sun Mar 12, 2023 6:51 pm ] |
Post subject: | Re: Ternary move instructions |
ARMv8 A64's CSEL does pretty much exactly that: CSEL Rdest, Rtrue, Rfalse, cond |
Author: | linguofreak [ Mon Mar 13, 2023 12:43 am ] |
Post subject: | Re: Ternary move instructions |
nullplan wrote: So my first thought was "if any, it would be ARM". Not quite, but ARM has a two-operand move instruction and allows you to put conditions on all instructions, so you could Code: MOVScc Rx, Ry where cc and ncc are opposite conditions.MOVSncc Rx, Rz Come to think of it, you could do the same with CMOV in x86 as well. I'm specifically looking for ISAs that have a single instruction directly equivalent to the ternary operator. Mostly just out of curiousity. |
Author: | linguofreak [ Mon Mar 13, 2023 12:45 am ] |
Post subject: | Re: Ternary move instructions |
Octocontrabass wrote: Do AVX V(P)BLEND instructions count? They are very much (in a bitwise fashion) in the same spirit as the type of instruction I'm looking for, but what I'm specifically looking for is instructions that test a one-bit condition and move one of two values to a destination based on that condition. |
Author: | linguofreak [ Mon Mar 13, 2023 12:52 am ] |
Post subject: | Re: Ternary move instructions |
alexfru wrote: The traditional MIPS ISA has a few conditional moves:
EDIT to add: MIPS Release 6 has these instead:
SEL.fmt appears to be exactly the kind of instruction I'm looking for. |
Author: | nullplan [ Mon Mar 13, 2023 11:03 am ] |
Post subject: | Re: Ternary move instructions |
linguofreak wrote: I'm specifically looking for ISAs that have a single instruction directly equivalent to the ternary operator. Mostly just out of curiousity. Well, the only other thing I remember that sort-of fits is PowerPC's fsel instruction Code: fsel fd,ft,fa,fb But that is floating-point only, and an optional instruction.
which does: fd = ft >= 0? fa : fb |
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