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 Post subject: Re: MOSI- SPI
PostPosted: Fri Apr 05, 2024 10:48 am 
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ravi wrote:
clock gating is disabled(ie. set to Hw_clk)

Doesn't that mean hardware controls clock gating? Try using "force on" or "force off" and see what happens.

The PSE SPI f_input is 100MHz, but I don't know if it's the same for PCH SPI. Firmware might be able to change f_input for PCH SPI.


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 Post subject: Re: MOSI- SPI
PostPosted: Fri Apr 05, 2024 10:59 am 
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thanks i will try


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 Post subject: Re: MOSI- SPI
PostPosted: Mon Apr 08, 2024 2:10 pm 
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Tried not effect,

Force on, no signal, Force Off works the same way(same frequency)

i tired with PSE SPI,, i am able to get the desired min to max Clock frequency, as per the give calculation,

not sure what is issue with PCH


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Ravi


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 Post subject: Re: MOSI- SPI
PostPosted: Tue Apr 09, 2024 7:00 pm 
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I didn't see anything in the datasheets that would explain the PCH behavior. You might have to ask Intel directly.


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 Post subject: Re: MOSI- SPI
PostPosted: Fri Apr 12, 2024 5:17 pm 
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OctocontrabasS

i have asked some time back yet to receive response from Intel


Thanks
Ravi


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 Post subject: Re: MOSI- SPI
PostPosted: Wed May 08, 2024 2:15 pm 
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Hello Octocontrabass

I am trying to use PSE SPI1, RDC-614110, Intel ATom ELkhart lake

everything works fine

1) i check Status before putting anything in the Buffer (i.e waiting for TX FIFO to be 0, RX fifo to be 0 and device not busy)
2) CS asserts when the data is put in the FIFO
3) CS de asserts when FIFO is empty

occasionally every few thousand samples, what is happens is for example if the command is 8 byte wide , 6 bytes are transmitted under one sequence (i.e CS active-> data on the bus-> CS de-active) and 2 bytes are transmitted in separate sequence, this is creating lot of [problems(interrupts are disabled)

Thanks


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 Post subject: Re: MOSI- SPI
PostPosted: Wed May 08, 2024 9:27 pm 
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ravi wrote:
(interrupts are disabled)

You can't disable SMI.

Have you tried using DMA? SMI shouldn't interfere with DMA transfers.


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 Post subject: Re: MOSI- SPI
PostPosted: Fri May 17, 2024 1:29 pm 
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Hello Octocontrabass

Can an SMI interrupt when in protected mode?

Evaluating Use of DMA/Interrupts


Thanks
Ravi


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 Post subject: Re: MOSI- SPI
PostPosted: Fri May 17, 2024 1:51 pm 
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SMI can interrupt at any time in any mode.


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 Post subject: Re: MOSI- SPI
PostPosted: Wed May 22, 2024 9:12 am 
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You can control CS manually with the SPI_CS_CONTROL register.


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