OSDev.org
https://forum.osdev.org/

Is the Apple M1 chip AMP?
https://forum.osdev.org/viewtopic.php?f=11&t=56319		 Page 1 of 1
Author:  nexos [ Sun Jun 12, 2022 8:27 pm ]
Post subject:  Is the Apple M1 chip AMP?
Hello,
I just read something on Apple's website which leads me to believe that the Apple M1 might me an AMP system, where the cores are different types. Here is what it says:
Apple wrote:
The powerful 8-core CPU combines four performance cores and four efficiency cores

That could just be a marketing tactic, macOS could also tune its scheduler for that, while still being SMP. Can anyone confirm or deny if M1 is AMP?
Author:  Octocontrabass [ Sun Jun 12, 2022 9:59 pm ]
Post subject:  Re: Is the Apple M1 chip AMP?
I don't know if it really qualifies as AMP (ARM calls it HMP - heterogeneous multiprocessing) but yes, Apple's M1 CPU contains two different types of cores.
Author:  klange [ Sun Jun 12, 2022 10:11 pm ]
Post subject:  Re: Is the Apple M1 chip AMP?
As Octocontrabass says, it's not really AMP in the way AMP is usually differentiated from SMP.

Yes, there are two sets of cores with different performance characteristics, but the usual separating factor between symmetric and asymmetric systems is that the cores have different access to peripherals, and this is not the case with the two classes of performance cores in the M1 chipsets.

Scheduling can treat them all the same, and then performance and power usage would presumably hit some middle ground between the two, but obviously this not the point of the setup.

This is similar to how many SMP systems still have NUMA - non-uniform memory access - except instead of memory, it's power... sort of.
Author:  nexos [ Mon Jun 13, 2022 5:39 am ]
Post subject:  Re: Is the Apple M1 chip AMP?
Ah, that makes sense. I think I was confused by this quote from the wiki:
Quote:
AMP means that at least one of the CPUs are different.
Author:  thewrongchristian [ Mon Jun 13, 2022 7:45 am ]
Post subject:  Re: Is the Apple M1 chip AMP?
This reminds me of a colleague's SPARCstation 10 about 20 years ago.

He had a dual CPU workstation, with I think, a 60MHz SuperSPARC I in one MBUS slot, and a 85MHz SuperSPARC II in the other MBUS slot.

I was agog that it worked, when contemporary x86 machines often complained when mixing steppings of otherwise the same CPU. MBUS isolated the details, and Solaris just shrugged it's shoulders and got on with it. I don't think Solaris made any scheduling decisions based on the asymmetry of the CPUs, though.
Page 1 of 1 All times are UTC - 6 hours
Powered by phpBB © 2000, 2002, 2005, 2007 phpBB Group
http://www.phpbb.com/