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 Post subject: [SOLVED] e1000: Null RX descriptor!!
PostPosted: Fri May 26, 2023 2:25 am 
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Joined: Fri May 26, 2023 1:48 am
Posts: 2
Hello,

First post, so please be kind. I'm stuck.

I'm writing an e1000 driver. QEMU. x86, 32 bit.

I've been working from this document for settings etc (https://pdos.csail.mit.edu/6.828/2022/r ... Be_SDM.pdf).

I've patched QEMU and enabled E1000_DEBUG and all debugflags in hw/net/e1000.c (see https://github.com/qemu/qemu/blob/master/hw/net/e1000.c)

I don't believe I have any problems setting various MMIO registers. QEMU seems to confirm my MMIO writes.

My problem is that the buffers pointed to by each RX Descriptor in the RX Descriptor List are not being copied by QEMU (see line 962 of https://github.com/qemu/qemu/blob/master/hw/net/e1000.c).

The base variable at line 961 is equal to my RDBAL and it appears the call to pci_dma_read at line 962 is not copying my RX Descriptors to desc.

This is confirmed whenever this part of QEMU is executed. QEMU says, "e1000: Null RX descriptor!!". Plus I've added some additional DBGOUT() calls that tell me that the contents of desc.buffer_addr is 0.

I was first trying to write the physical/virtual (identity mapped) address of the RX Descriptor List to registers RDBAL and RDBAH. I'm now writing the physical addresses (no longer identity mapped) to the same registers. Same errors.

Originally I was doubting the memory layout of my RX Descriptor List. However, I've recently come across this driver (https://github.com/Klaykap/BleskOS/blob ... _intel.asm). Mine virtually identical to the structure that starts at ln 127 et al.

Now I'm thinking it could be a DMA/caching/paging issue rather than a register setting or memory layout problem.

I've put my RX Descriptor List and each RX buffer on independent page frames. They're all aligned to each page.

My RX Descriptor list is not identity mapped. However each of my buffers are identity mapped. I believe each page frame is marked page cache disabled, supervisor mode, writeable and present.

PCI Bus Mastering bit has been enabled.

I welcome any and all suggestions :)


Last edited by szfl4600 on Wed May 31, 2023 4:06 am, edited 1 time in total.

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 Post subject: Re: e1000: Null RX descriptor!!
PostPosted: Wed May 31, 2023 4:06 am 
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Joined: Fri May 26, 2023 1:48 am
Posts: 2
I solved this about 2 seconds after I posted it.

The PCI System/Cmd register was not being written because of an ID10T error. So the bus mastering bits etc were not being set.

I hope I didn't waste anyone's time looking into this! :)


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