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 Post subject: Undefined opcode
PostPosted: Thu Dec 08, 2022 9:47 am 
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Hello!

I occurred a weird problem today, it is that I get a Undefined opcode interrupt whenever gcc uses a xmm register, even though bochs says mmx is supported (here)

This problem didn't occur before because I had the -mno-mmx flag set. But now I took reference (aka copied) the flags from ToaruOS and I got this error, so why is xmm registers crashing the computer? These are my cc flags https://github.com/cheyao/AchieveOS/blo ... akefile#L5 (The ones commented out were part of my old flags)

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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 9:54 am 
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Did you enable SSE? To my knowledge, there is a flag in CR4 that needs to be set. If not then all references to SSE registers will cause an undefined opcode exception.

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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 10:16 am 
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nullplan wrote:
Did you enable SSE? To my knowledge, there is a flag in CR4 that needs to be set. If not then all references to SSE registers will cause an undefined opcode exception.


Ahh yes that was the problem! Didn't know that SSE was the same as MMX. Thanks for telling!

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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 11:28 am 
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Cyao wrote:
Didn't know that SSE was the same as MMX. Thanks for telling!
It isn't. MMX was the stuff with the MM registers (MM0-MM7, mapped to the FPU registers), whereas SSE was the stuff with the XMM registers. Different registers, different instructions. And then came AVX, which extended the XMM registers to the YMM registers, and now AVX512 extended it again to the ZMM registers. And also the register file now exceeds 2kB in size. Don't know what they will come up with next.

MMX is rarely worth the effort these days, since the MM registers are only 64-bit and you can get that from the GP registers already.

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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 12:28 pm 
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Also, enabling SSE in your kernel means you need to save and restore the SSE registers on kernel entry and exit.

Using SSE in your kernel can actually hurt performance, since you need to save and restore the SSE registers on every kernel entry and exit instead of only when switching tasks.


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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 12:51 pm 
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Octocontrabass wrote:
Also, enabling SSE in your kernel means you need to save and restore the SSE registers on kernel entry and exit.


Why do I need to store them? Is this for multitasking or it also applies to my singletasking OS?

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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 3:07 pm 
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Interrupts can happen at any time, including while a program is using SSE registers. Doesn't your kernel handle interrupts?

...And what's the point of a single-tasking OS when modern CPUs have so many cores?


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 Post subject: Re: Undefined opcode
PostPosted: Thu Dec 08, 2022 3:09 pm 
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Octocontrabass wrote:
Interrupts can happen at any time, including while a program is using SSE registers. Doesn't your kernel handle interrupts?

Ahh yea totally forgot about interrupts
Octocontrabass wrote:
...And what's the point of a single-tasking OS when modern CPUs have so many cores?

Because it's easy to implement and will have less bugs :)

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