The original code reset the CPU constantly, so I think my CPU does support the 1 GB Page, it does looping with that code.
Code:
Yes:
mov eax, 0x80000001
cpuid
mov eax, edx
or eax, 1 << 26
cmp edx, eax
je Yes
And you are right about the PS thus here's an update of the code.
Code:
; Setup paging
;{
; Paging Structures in the Different Paging Modes
; Linear-Address Translation to a 1-GByte Page using 4-Level Paging
;{
; Format of a PML4 Entry (PML4E) that References a Page-Directory-Pointer Table
;{
%define PG_FLAG_P(bit) (bit << 0) ; 0: Page not Present 1: Page Present
%define PG_FLAG_RW(bit) (bit << 1) ; 0: Read-only 1: Read Write
%define PG_FLAG_US(bit) (bit << 2) ; 0: Supervisor Mode 1: User Mode
%define PG_FLAG_PWT(bit) (bit << 3) ; 0: Page-level write-through 1: Page-level write-through
%define PG_FLAG_PCD(bit) (bit << 4) ; 0: Page-level cache disable 1: Page-level cache disable
%define PG_FLAG_A(bit) (bit << 5) ; 0: Accessed 1: Accessed
%define PG_FLAG_PS(bit) (bit << 7) ; Reserved (must be 0)
mov eax, PG_FLAG_P(1) + PG_FLAG_RW(1) + PG_FLAG_US(0) + PG_FLAG_A(1) + PG_FLAG_PS(0)
; Build the PML4 Table
mov [PagingTable.PML4], dword PagingTable.PDPT
or [PagingTable.PML4], eax
;}
; Format of a Page-Directory-Pointer-Table Entry (PDPTE) that Maps a 1-GByte Page
;{
%define PG_FLAG_P(bit) (bit << 0) ; 0: Page not Present 1: Page Present
%define PG_FLAG_RW(bit) (bit << 1) ; 0: Read-only 1: Read Write
%define PG_FLAG_US(bit) (bit << 2) ; 0: Supervisor Mode 1: User Mode
%define PG_FLAG_PWT(bit) (bit << 3) ; 0: Page-level write-through 1: Page-level write-through
%define PG_FLAG_PCD(bit) (bit << 4) ; 0: Page-level cache disable 1: Page-level cache disable
%define PG_FLAG_A(bit) (bit << 5) ; 0: Accessed 1: Accessed
%define PG_FLAG_D(bit) (bit << 6) ; 0: Dirty 1: Dirty
%define PG_FLAG_PS(bit) (bit << 7) ; 0: Refer a Page Directory 1: Refer a 1-GByte Page
%define PG_FLAG_G(bit) (bit << 8) ; 0: Global 1: Global
%define PG_FLAG_PAT(bit) (bit << 12) ; 0: Paging and Memory Typing 1: Paging and Memory Typing
mov eax, PG_FLAG_P(1) + PG_FLAG_RW(1) + PG_FLAG_US(0) + PG_FLAG_A(1) + PG_FLAG_D(1)+ PG_FLAG_PS(1)
; Build the Page-Directory-Pointer-Table
mov ecx, 4 ; 512 entries max
mov edi, PagingTable.PDPT
.SetNextEntry:
;{
mov [edi], eax ; Set new PDPT Entry
add eax, 0x4000_0000 ; Next 1-GB page
add edi, 8 ; Next PDPT Entry
loop .SetNextEntry
;}
;}
;}
;}
And Qemu does boot this but not my real machine.