Somehow I had no idea that consistent TSC existed. Regardless, it sounds like I should prepare for any scenarios where any combination of clocks exist... but I'm likely overestimating how hard the implementation will be. I guess I don't even really need to implement how I'll use the clocks just for booting multiple cores, as I can just have simple one-shot primitives set up for multicore booting.
Just curious, with consistent TSC, when I boot more cores, will those cores have the same value in their own TSC registers?
Also, in your experience, how accurate do the delays need to be for SMP booting? Do I need to worry about the overhead of a few calls in C while delaying?
(Not sure if this is obvious, but I'm kind of running off the example here.
https://wiki.osdev.org/SMP#Startup_Sequence)