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GICv3 memory mapped registers always 0
https://forum.osdev.org/viewtopic.php?f=1&t=43342
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Author:  ARMy [ Sun May 02, 2021 1:00 pm ]
Post subject:  GICv3 memory mapped registers always 0

Hi,

I am trying to get interrupts working on my operating system for ARMv8 on QEMU. But when I read the GICv3 memory mapped registers after writing, they are always 0.

Code:
ldr x0, =0x8000380 GICD_ICACTIVER
ldr w1, =0x0xffffffff
str w1, [x0]
dsb sy
ldr w2, [x0]

>>> info register x2
x2             0x0                 0
>>> x/1w 0x8000380
0x8000380   0

Can someone give me please a hint what the problem could be?

Author:  qookie [ Tue May 04, 2021 6:27 am ]
Post subject:  Re: GICv3 memory mapped registers always 0

Are you sure the GIC base is 0x8000000? Did you map it in as device nGnR(nE/E) memory (qemu doesn't really care but real hardware does care a lot)? Do you see any values at all? Try reading from GICD_IIDR, which is at offset 0x08 from the base of the distributor, and seeing if that also returns all 0s.

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