lukassevc wrote:
Okay, I think I finally understand what you were trying to tell me the whole time, so for an example image we are saving 0x1234 to the memory address 0x00000, it spits out the address and pulls /BHE low, then it puts 0x0034 to the 16-bits wide data bus, then it pulls /BHE high and spits 0x1200 to the data bus, the /BHE signal is essentially the A0 ( later signals /B0 to /B7 represent decoded address lines A0 to A2) , am I correct?
Not quite. If you're writing a word to a word-aligned address, the CPU will write the entire word in one cycle. The CPU will pull both A0 and /BHE low to indicate it's accessing both bytes of the word, then put 0x1234 on the data bus. (A0 and /BHE are similar to /B0 and /B1 in newer processors.)
If the CPU is only accessing one byte in a word, then it will pull A0 low if it's accessing the byte at the even address, or it will pull /BHE low if it's accessing the byte at the odd address. To write a word at an odd (not aligned) address, the CPU will split it into two bytes and use two cycles.
lukassevc wrote:
The attached image explains this, the according bank/i.e. the according 8-bits of the whole data bus are selected using the /Bn signals. And if so, the last question the HDD most likely saves to each address one byte from the loaded 512 bytes, right?
Right.
lukassevc wrote:
Also, when I, for example, do mov eax, [0x1234, then the lowest 8-bits are from address 0x1234, the seconds left-most 8-bits are from the address 0x1235, the third left-most 8-bits are from the address 0x1236 and the forth left-most 8-bits are from the address 0x1237, i.e. eax=[0x1237][0x1236][0x1235][0x1234], what basically means that the address in square bracelets represents the corresponding 8-bits, right?
Right.