[AArch64] [GAS] (Cortex-A53) - Accessing ICC_x registers

krjdev · **Posted:** Mon Jun 08, 2020 10:33 am

Not sure if this is the right sub-forum for this question...

Want to port my OS to the AArch64 architecture. I started with a simple bare-metal application, to learn this architecture
Now I want to implement interrupt support, but run into an issue with GAS/GCC:

The problem is, I can't access the ICC_x registers.

The code:

Code:

#include <asm.h>

#define ICC_SRE_EL2_FIQ     0x2
#define ICC_SRE_EL2_IRQ     0x4

.text

FUNCTION(_cpu_get_el)
    mrs x0, CurrentEL
    and x0, x0, #0xC
    asr x0, x0, #2
    ret

FUNCTION(_cpu_get_id)
    mrs x0, MPIDR_EL1
    and x0, x0, #0x3
    ret

FUNCTION(_cpu_get_icc_sre_el2)
    mrs x0, ICC_SRE_EL2
    ret

FUNCTION(_cpu_set_icc_sre_el2_irq)
    mrs x0, ICC_SRE_EL2
    orr x0, x0, #ICC_SRE_EL2_IRQ
    msr ICC_SRE_EL2, x0
    ret

FUNCTION(_cpu_set_icc_sre_el2_fiq)
    mrs x0, ICC_SRE_EL2
    orr x0, x0, #ICC_SRE_EL2_FIQ
    msr ICC_SRE_EL2, x0
    ret

.end

Accessing CurrentEL and MPIDR_EL1 works. But on ICC_SRE_EL2 I get the following errors:

Code:

$ make
aarch64-none-elf-gcc -c -Wall -I ./include -ffreestanding -mcpu=cortex-a53 -Wa,-mcpu=cortex-a53 misc.S -o misc.o
misc.S: Assembler messages:
misc.S:38: Error: unknown or missing system register name at operand 2 -- `mrs x0,ICC_SRE_EL2'
misc.S:42: Error: unknown or missing system register name at operand 2 -- `mrs x0,ICC_SRE_EL2'
misc.S:44: Error: unknown or missing system register name at operand 1 -- `msr ICC_SRE_EL2,x0'
misc.S:48: Error: unknown or missing system register name at operand 2 -- `mrs x0,ICC_SRE_EL2'
misc.S:50: Error: unknown or missing system register name at operand 1 -- `msr ICC_SRE_EL2,x0'

Seems these registers are not implemented by GCC.

Can somebody explain me, what I'm doing wrong?

EDIT:
- Fixed wrong code in function _cpu_set_icc_sre_el2_fiq()

Octocontrabass · **Joined:** Mon Mar 25, 2013 7:01 pm **Posts:** 5145

GAS doesn't know the names of all of the special-purpose registers. Sometimes you'll have to use generic names based on the instruction encoding.

For example, the ARM documentation says this about ICC_SRE_EL2:

Code:

op0   op1    CRn     CRm     op2
0b11  0b100  0b1100  0b1001  0b101

You can use that information to translate ICC_SRE_EL2 into a generic SPR name that GAS will recognize:

Code:

#define ICC_SRE_EL2 S3_4_C12_C9_5

krjdev · **Posted:** Mon Jun 08, 2020 12:35 pm

Thank you!

Didn't find this question on Stack Overflow.

Could somebody please extend the ARM wiki with this information?
To avoid similar questions like mine.

kzinti · **Joined:** Mon Feb 02, 2015 7:11 pm **Posts:** 898

krjdev wrote:

Could somebody please extend the ARM wiki with this information?
To avoid similar questions like mine.

Yes, good idea. Please do update the wiki.

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[AArch64] [GAS] (Cortex-A53) - Accessing ICC_x registers

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