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Hi, I recently moved my kernel into higher half.
However, since my GDT is stored in the first megabyte (generated by my bootloader) after enabling paging that address refers to a page (directory) that is not present.
So I'm now creating a new GDT in the entrypoint of my kernel.

Here are a few questions that I have:

1. Why does having an invalid GDT pointer only triple fault whenever an IRQ happens and not when executing random code, even with jmps in it?
(if I don't ever do sti it seems to work fine on all virtual machines i've tested on: VMWare, bochs, qemu)

2. When is GDT actually accessed by the CPU and how far can you go with it being invalid?

3. When I create a new GDT and load it, do I need to reload the registers (by jumping etc) if the offsets are still the same? (e.g 0x08 for code and 0x10 for data)

Thanks.

1. The reason that it triple faults when an interrupt occurs is because the processor reloads the segment registers during an IRQ
2. The processor caches descriptors, and how far you can go depends
3. Yes, so the processor will refresh its descriptor cache

I would recommend what you do is load the GDT first thing before anything, except maybe a serial port driver for debugging

Your random code doesn't reload any segment registers, so the CPU can keep running with cached segments. IRQs involve loading the CS register with the selector in your IDT, and loading any segment register typically requires the GDT to be present. (The only exceptions to this are the "fast system call" instructions.)


Other than the fast system call instructions, anything that causes the CPU to load a segment register will involve accessing the GDT. That includes obvious things like "MOV DS, AX" as well as implicit things like exceptions and IRQs.

As long as you never do anything that requires accessing the GDT, you can go forever with the cached values. (It would be very inconvenient.)


No, but it's probably a good idea to do it anyway.

Awesome, thanks everyone for the responses!