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 Post subject: detection of i/o adress of a pci device
PostPosted: Sun Oct 27, 2019 10:10 am 
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i use a routine to detect IDE controler on pci bus here is the code:

Code:

mov ebx,80000008h
mov esi,ad_descd
boucle_detec_ata:
mov dx,0CF8h
mov eax,ebx
out dx,eax
mov dx,0CFCh
in eax,dx
cmp ax,0FFFFh
je pasctrlata
mov edx,eax
and eax,0FFFF0000h
cmp eax,001010000h  ;class=01h sub-class=01h
jne pasctrlata

mov word[esi+dd_atribut],00h
mov word[esi+dd_atribut+32],10h
mov word[esi+dd_atribut+64],00h
mov word[esi+dd_atribut+96],10h

mov dx,0CF8h
mov eax,ebx
add eax,24     ;BAR4
out dx,eax
mov dx,0CFCh
in eax,dx
test al,1
jz crtl_dma_abs
and eax,0FFFCh
cmp eax,0
je crtl_dma_abs
or word[esi+dd_atribut],08h
or word[esi+dd_atribut+32],08h
or word[esi+dd_atribut+64],08h
or word[esi+dd_atribut+96],08h
crtl_dma_abs:
mov [esi+dd_adress_dma],ax
mov [esi+dd_adress_dma+32],ax
add eax,8
mov [esi+dd_adress_dma+64],ax
mov [esi+dd_adress_dma+96],ax

mov dx,0CF8h
mov eax,ebx
add eax,8     ;BAR0
out dx,eax
mov dx,0CFCh
in eax,dx
test al,1
jz bar0_nok
and eax,0FFFCh
cmp eax,0
jne bar0_ok
bar0_nok:
mov eax,1F0h
bar0_ok:
mov [esi+dd_adress_base],ax
mov [esi+dd_adress_base+32],ax

;************************************
;some simmilar code for bar1-bar3
;************************************

add esi,64

pasctrlata:
add ebx,100h
test ebx,7F000000h
jz boucle_detec_ata


it work fine except for one of my computer, it detec adress of 30A8h for the base of 1st controler but the correct adresse is 1F0h (the standard adress), i think the problem is in the methode of reading the adresse because i use the same way to read the adress of uhci controler and it doesnt work too


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Sun Oct 27, 2019 10:20 am 
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0x1f0 is certainly the standard port when using the device as a simple ide controller, but it will have a different base address when used as a more fully featured PCI controller.


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Sun Oct 27, 2019 10:49 am 
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the osdev.org documentation (https://wiki.osdev.org/PCI_IDE_Controller) do not talk about others feature, do you have documentation about that?


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Sun Oct 27, 2019 3:55 pm 
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https://wiki.osdev.org/AHCI


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Sun Oct 27, 2019 4:52 pm 
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it's not a AHCI controler, the subclass is 01h. the subclass for ahci is 06h

and the vendor/device id is 8089/2828 (for 2801HM/HEM (ICH8M/ICH8M-E) SATA Controller [IDE mode]) there is a ahci mode for this device but with te vendor/device id of 8086/2829

maybe my pb is because i have some electonics failure in this computer, the bios clock have some pb too


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 12:42 am 
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Have you read the technical documentation for this chip?


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 3:38 am 
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I dont find the specific datasheet for this chip


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 4:53 am 
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https://www.intel.co.uk/content/www/uk/ ... sheet.html


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 11:51 am 
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i have to check in https://www.intel.com/content/www/us/en ... pdate.html that my device is the good one
but now i'm sure: my problem is a hardware problem (usually it's a software problem :mrgreen:) and my controler do not have special function (it's not a feature, it's a bug :mrgreen:)


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 12:06 pm 
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OK, if that's what you want to think.

I've pointed you to the relevant information, and I can't do more than that.


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 Post subject: Re: detection of i/o adress of a pci device
PostPosted: Mon Oct 28, 2019 1:32 pm 
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you gave me the complete documentation of my chipset, which proves to me that my code should never have returned this kind of information, what did I miss?


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