Why is ISA IRQ0 mapped to IRQ2 on IOAPIC?

pvc · **Joined:** Mon Jan 15, 2018 2:27 pm **Posts:** 201

Why is ISA IRQ0 mapped to IRQ2 on IOAPIC (at least in QEMU and maybe Bochs)? I couldn't get PIT IRQ to work when using IOAPIC so I decided to build debug version of QEMU and use debugger to see what the problem is. In hw/intc/ioapic.c I've found this little piece of code:

Code:

static void ioapic_set_irq(void *opaque, int vector, int level)
{
    IOAPICCommonState *s = opaque;

    /* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
     * to GSI 2.  GSI maps to ioapic 1-1.  This is not
     * the cleanest way of doing it but it should work. */

    trace_ioapic_set_irq(vector, level);
    ioapic_stat_update_irq(s, vector, level);
    if (vector == 0) {
        vector = 2;
    }
    ...

Which is obviously why I couldn't get PIT IRQ to fire. But why is it that way?

zhiayang · **Joined:** Tue Dec 27, 2011 7:57 am **Posts:** 368

When you switch to LAPIC/IOAPIC mode, you are supposed to look at the interrupt mapping table in one of the ACPI tables (probably the MADT which is where you should have gotten your IOAPIC info, no?) that tells you which interrupt goes where. For example:

Code:

[log] acpi: ioapic[0] at 0xfec00000
[log] acpi: intr source: bus 0, irq 0, gsi 2
[log] acpi: intr source: bus 0, irq 5, gsi 5
[log] acpi: intr source: bus 0, irq 9, gsi 9
[log] acpi: intr source: bus 0, irq 10, gsi 10
[log] acpi: intr source: bus 0, irq 11, gsi 11

This is what I get. I forget what GSI stands for, but that's the interrupt number the IOAPIC will give you when the IRQ number fires; as you can see, IRQ0 will fire interrupt 2 on the apic.

EDIT: as for why it's not a 1:1 mapping, who knows? I don't.

nullplan · **Joined:** Wed Aug 30, 2017 8:24 am **Posts:** 1604

GSI stands for "global system interrupt" and is an ACPI abstraction. You might have more than one APIC in the system, and then ACPI needs a way to quickly name "IRQ line x on APIC y", and this is done with GSIs. Mind you, most systems only have a single IOAPIC.

pvc · **Joined:** Mon Jan 15, 2018 2:27 pm **Posts:** 201

I was hoping I could do without ACPI

Guess I'll have to change my plans.

nullplan · **Joined:** Wed Aug 30, 2017 8:24 am **Posts:** 1604

ACPI is basically a language for the description of the mainboard. If you can get the necessary data in other ways (writing a mainboard driver and then recognizing it with, say, the SMBIOS strings), then you don't need ACPI. Though it is the more general solution.

pvc · **Joined:** Mon Jan 15, 2018 2:27 pm **Posts:** 201

That is exactly what I was doing before. But, as for now, I have just integrated ACPICA into my kernel. It wasn't even that difficult.

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Why is ISA IRQ0 mapped to IRQ2 on IOAPIC?

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