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PCI and Register Addressing
https://forum.osdev.org/viewtopic.php?f=1&t=33794
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Author:  Malfunction [ Sun Jul 28, 2019 8:20 am ]
Post subject:  PCI and Register Addressing

Hello again.. I'm beginner and having hard time understanding PCI register mappings (as some of you already know)...

The thing is if I could connect devices to a PC CPU's I/O bus directly and used fixed adresses for their registers (for example 0x0001 for Register A of Device 1, 0x0002 for Register B of Device 1 and 0x0003 for Register A of device 2), everything would be very easy.

If I got it right BIOS (or Operating system) initializes PCI devices using PCI Configuration Space. They communicate through PCI protocol and exchange information and BIOS(or operating system) fills BAR(base address registers) of the device which is available through configuration space. So device requests 1 to 6 different memory/IO port regions from PC and it allocates them and fills the configuration table with allocated addresses. Not sure if I got this right but my real question is:

Suppose I have a device with 5 registers. How do I know which memory address or io port address corresponds to 1st register (call it register A) for example? Even if I can read BAR registers I can't understand under which rules these assignments are made.

So how can I know something like this:

Register A --- BAR0 + 0x0000
Register B --- BAR0 + 0x0004
Register C --- BAR1 + 0x000C

etc.

I'm so lost and I don't have a PCI supporting device to work on. Just want to learn this theoretically :oops:

Author:  iansjack [ Sun Jul 28, 2019 9:40 am ]
Post subject:  Re: PCI and Register Addressing

The documentation for the particular hardware component will detail which registers correspond to which offset from the base address. It will also tell you what the function of each of those registers is.

The BIOS, or your OS, can set the base address - everything after that is predetermined by the particular device.

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