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OS development problems about PIC 8259A
https://forum.osdev.org/viewtopic.php?f=1&t=33776
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Author:  benji [ Sat Jul 20, 2019 11:17 am ]
Post subject:  OS development problems about PIC 8259A

:? Hello, OS developers.
I am a os lover. But recently, I am not happy about it.
I think I faced a very weird problem that is my os kernel can run on the qemu, but it can't run on VMware.
It look like a PIC problem. Because if I turn off the all the PICs, then I found it can run on the VMware.
I guess it's problem may assicated with IDT_Gate_Descriptor. possibly, I set the incorrect IDT descriptor. So I copy the others funtions that can set IDT descriptor. But I found the problem still exist.
I use the I/O instruction to prohibit the others IRQs except the IRQ1 that is keyborad interruption in 8259A so that make you easyly find the problem localtion. the instruction is io_out8_ASM(PIC0_IMR, 0xfd ); /*(this instruction in pic.c) 0xfd = 11111101. all of PIC's interupt is prohibited except IRQ1. The PICO_IMR=0x21*/.
as long as you enter any character on my os running on VMware,It will breakdown.

Code:
This is my idt.c that includes "set idt gate descriptor function" :
#include "../com/types.h"
#include "idt.h"
#include "handler_ASM.h"
#include "io_ASM.h"

void init_idt(){
   IDT_Gate_Descriptor *idt=(IDT_Gate_Descriptor*)IDT_ADDR; // The IDT_ADDR = 0x00090000, Is this address invaild?
   for (int i = 0; i <= IDT_LIMIT / 8; i++) {
      set_idt_gatedesc(idt + i, 0, 0, 0);
   }
   load_idtr(IDT_LIMIT, IDT_ADDR);
   set_idt_gatedesc(idt + 0x21, (int)_asm_inthandler21_keyboard, 8, AR_INTGATE32);
   set_idt_gatedesc(idt + 0x20, (int)_asm_inthandler20_timer, 8, AR_INTGATE32);   
}

void set_idt_gatedesc(IDT_Gate_Descriptor *gd, int offset, int selector, int ar) {
   gd->offset_low   = offset & 0xffff;
   gd->selector     = selector;
   gd->dw_count     = (ar >> 8) & 0xff;
   gd->access_right = ar & 0xff;
   gd->offset_high  = (offset >> 16) & 0xffff;
   return;
}


in the init.c, the function of io_sti is open all of descripters and include one X86 instruction STI.
I use win10 64bit to compiler the os code. a month ago, I use the ubuntu 32bit to compile the os code. If I use ubuntu to compile code, the os can run on the VMware!!! very weird!!!
without compile, You can run my os with DolphinOS.img directly.
then, this is all of my os code in rar.

Attachments:
File comment: This is my os code
DolphinOS0.07g.rar [19.25 KiB]
Downloaded 5 times

Author:  MichaelPetch [ Sat Jul 20, 2019 3:35 pm ]
Post subject:  Re: OS development problems about PIC 8259A

Do you set up your own GDT and load it with LGDT? I don't see a link to your files/project that you mention in your question.

Author:  benji [ Sat Jul 20, 2019 7:36 pm ]
Post subject:  Re: OS development problems about PIC 8259A

MichaelPetch wrote:
Do you set up your own GDT and load it with LGDT? I don't see a link to your files/project that you mention in your question.

Yes, I think I set up. I am so sorry I don't know why my rar file would not be upload

Attachments:
File comment: This is my os code
DolphinOS0.07g.rar [19.25 KiB]
Downloaded 2 times

Author:  MichaelPetch [ Sun Jul 21, 2019 7:20 am ]
Post subject:  Re: OS development problems about PIC 8259A

In this code:
Code:
void inthandler21_keyboard(int32_t *esp){
        printk("  INT21 (IRQ-1)  ");
        io_out8_ASM(PIC0_OCW2,0x61);
        io_in8_ASM(0x60); //It is very important sentence in the function. If you haven't read the data, the 8042 still think the interupt hasn't be completed.
}

uint32_t times=0;

void inthandler20_timer(int32_t *esp){
        io_out8_ASM(PIC0_OCW2, 0x60);
        times++;
        //print * per second
        if(times%100==0){
                printk("*");
        }
}
In particular in the keyboard handler you do
Code:
io_out8_ASM(PIC0_OCW2,0x61);
and in the timer handler you do
Code:
io_out8_ASM(PIC0_OCW2, 0x60);
Because you are using cascaded mode you can send a non-specific EOI to the PIC simply by doing
Code:
io_out8_ASM(PIC0_OCW2, 0x20);
in both cases instead of using a specific EOI (0x60 and 0x61)

Author:  benji [ Mon Jul 22, 2019 8:04 am ]
Post subject:  Re: OS development problems about PIC 8259A

MichaelPetch wrote:
In this code:
Code:
void inthandler21_keyboard(int32_t *esp){
        printk("  INT21 (IRQ-1)  ");
        io_out8_ASM(PIC0_OCW2,0x61);
        io_in8_ASM(0x60); //It is very important sentence in the function. If you haven't read the data, the 8042 still think the interupt hasn't be completed.
}

uint32_t times=0;

void inthandler20_timer(int32_t *esp){
        io_out8_ASM(PIC0_OCW2, 0x60);
        times++;
        //print * per second
        if(times%100==0){
                printk("*");
        }
}
In particular in the keyboard handler you do
Code:
io_out8_ASM(PIC0_OCW2,0x61);
and in the timer handler you do
Code:
io_out8_ASM(PIC0_OCW2, 0x60);
Because you are using cascaded mode you can send a non-specific EOI to the PIC simply by doing
Code:
io_out8_ASM(PIC0_OCW2, 0x20);
in both cases instead of using a specific EOI (0x60 and 0x61)


I changed the 0x60 to 0x20, but the problem still exist.

Author:  benji [ Mon Jul 22, 2019 8:10 am ]
Post subject:  Re: OS development problems about PIC 8259A

benji wrote:
MichaelPetch wrote:
In this code:
Code:
void inthandler21_keyboard(int32_t *esp){
        printk("  INT21 (IRQ-1)  ");
        io_out8_ASM(PIC0_OCW2,0x61);
        io_in8_ASM(0x60); //It is very important sentence in the function. If you haven't read the data, the 8042 still think the interupt hasn't be completed.
}

uint32_t times=0;

void inthandler20_timer(int32_t *esp){
        io_out8_ASM(PIC0_OCW2, 0x60);
        times++;
        //print * per second
        if(times%100==0){
                printk("*");
        }
}
In particular in the keyboard handler you do
Code:
io_out8_ASM(PIC0_OCW2,0x61);
and in the timer handler you do
Code:
io_out8_ASM(PIC0_OCW2, 0x60);
Because you are using cascaded mode you can send a non-specific EOI to the PIC simply by doing
Code:
io_out8_ASM(PIC0_OCW2, 0x20);
in both cases instead of using a specific EOI (0x60 and 0x61)


I changed the 0x60 to 0x20, but the problem still exist.

In the screen I can't see the printk(" INT21 (IRQ-1) ");
I ensure the kernel would not excuted this code.

Author:  benji [ Wed Jul 24, 2019 8:11 pm ]
Post subject:  Re: OS development problems about PIC 8259A

benji wrote:
benji wrote:
MichaelPetch wrote:
In this code:
Code:
void inthandler21_keyboard(int32_t *esp){
        printk("  INT21 (IRQ-1)  ");
        io_out8_ASM(PIC0_OCW2,0x61);
        io_in8_ASM(0x60); //It is very important sentence in the function. If you haven't read the data, the 8042 still think the interupt hasn't be completed.
}

uint32_t times=0;

void inthandler20_timer(int32_t *esp){
        io_out8_ASM(PIC0_OCW2, 0x60);
        times++;
        //print * per second
        if(times%100==0){
                printk("*");
        }
}
In particular in the keyboard handler you do
Code:
io_out8_ASM(PIC0_OCW2,0x61);
and in the timer handler you do
Code:
io_out8_ASM(PIC0_OCW2, 0x60);
Because you are using cascaded mode you can send a non-specific EOI to the PIC simply by doing
Code:
io_out8_ASM(PIC0_OCW2, 0x20);
in both cases instead of using a specific EOI (0x60 and 0x61)


I changed the 0x60 to 0x20, but the problem still exist.

In the screen I can't see the printk(" INT21 (IRQ-1) ");
I ensure the kernel would not excuted this code.

I am so confuse about this.
It may not the interruption problems

Author:  benji [ Thu Aug 01, 2019 11:37 pm ]
Post subject:  Re: OS development problems about PIC 8259A

My classmates tell me it could be that the stack problem (register esp)

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