USB EHCI memory mapped I/O how to use

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

I config Ehci on qemu ,when i read the pci config space offset 0x10 for ehci to get base address,
i get a memory mapped I/O address febd2000,how can access command register and status register .etc with this address?
And what is the detail of using memory mapped I/O address febd2000 for ehci?
below is my conifg cmdline of usb

Quote:

-usb -device usb-ehci,id=ehci -device usb-host,bus=ehci.0,vendorid=8086

Does '-device usb-host' mean i link up to my real machine for usb?

ray

BenLunt · **Posted:** Mon Oct 31, 2016 10:31 pm

This is called a Mem-Mapped I/O address. This means that memory is mapped to this I/O. You write a value to the memory at that location and the (PCI) bus will write it to the hardware.

The EHCI is, in my opinion, the most complicated of the four types of controllers. If you have not done any USB yet, I would suggest another controller type, maybe the xHCI. If you must do EHCI, I would suggest you learn UHCI or OHCI first, since the EHCI will send all low- and full-speed devices to those controllers anyway.

I have a book that describes all four controllers, how to detect them, how to program them, and then how to retrieve the packets from the devices attached.
http://www.fysnet.net/the_universal_serial_bus.htm
It also contains source code to do all of this.

I also try to answer all emails pertaining to the book, so if you get stuck, ask here, then if that fails, send me an email.

Ben

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

Thank you,ben. I have had your usb book through the amazon.com,it is a pdf format.And i have read the book.
Now my real machine is ehci,so i wonder i could config the qemu to my host machine.

And i want pdf of 'gui' part,'network' part,there seem no pdf on amazon ,can you give me a web link to them?

BenLunt · **Posted:** Tue Nov 01, 2016 12:05 pm

If you have my book, even though in Amazon Kindle form, you should have all you need to configure the EHCI.

As for writing to the controller, instead of using

Code:

outw(someaddress, someval);

You will use

Code:

*someaddress = someval;

As for as the Kindle version of the newer books, I haven't decided if I will release them in Kindle form. Your comments make a perfect example why I probably won't. Not that you are doing it, but since you state you have it in .PDF form, that sure makes it very easy to illegally distribute. Therefore, I may not continue to release Kindle forms...

Thanks,
Ben

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

Code:

   int addr,data,temp;
   char bus,dev,func,reg;
   unsigned int timeout = EHCI_RESET_DELAY;

   reg = 0x10;
   sprintf(us,"init usb");
   putfonts8_asc(binfo->vram, binfo->scrnx, 0, 32, COL8_FFFFFF, us);
   
   addr = PCI_BUS_CONFIG(0,4,0,reg);
   //write the new value of the base address I/O field back to its offset in the configuration space
   io_out32(0xCF8,addr);
   io_out32(0xCFC,usbaddr);
   
   // Write 0x00000000 to dword 0x34 and dword 0x38 of the configuration space
   reg = 0x34;
   addr = PCI_BUS_CONFIG(0,4,0,reg);
   io_out32(0xCF8,addr);
   io_out32(0xCFC,0x00000000);
   reg = 0x38;
   addr = PCI_BUS_CONFIG(0,4,0,reg);
   io_out32(0xCF8,addr);
   io_out32(0xCFC,0x00000000);
   //set irq field
   reg = 0x3C;
   addr = PCI_BUS_CONFIG(0,4,0,reg);
   io_out32(0xCF8,addr);
   io_out8(0xCFC,0x09);
   
   //write 0x02 if you were using memory mapped I/O
   reg = 0x04;
   addr = PCI_BUS_CONFIG(0,4,0,reg);
   io_out32(0xCF8,addr);
   io_out16(0xCFC,0x0002);
   
   mdelay(1000);
   temp = (*(usbaddr+0x00));
   sprintf(us,"ehci %x",temp);
   putfonts8_asc(binfo->vram, binfo->scrnx, 0, 48, COL8_FFFFFF, us);

I used ehci because my host is ehci,and set new address for mmio to 0x10 in pci config,set 0x02 to command to enable the mmio(in the book of fysos usb is 0x06 that i think it has problems),
but even i used 0x06 that is also failed.
why i read the CAPLENGTH as a value of 0?
Is there any lack of steps to enable the mmio?I really don't know. :?:

BenLunt · **Posted:** Tue Nov 01, 2016 10:49 pm

I don't know what you have in "usbaddr", but did you make sure and clear the bottom few bits? When you read the value, there may be a few bits set in the bottom four bits. Also, I don't remember if it was the EHCI or not, but it may require a 4k boundary address too, but that is from (faded) memory.

As for setting bit 3 in the command register (writing a value of 0x06), this also sets the bus master. If the device has a bus master, it would be nice to use it. If the device does not have a bus master, this does nothing.

Have you set the power mode of the PCI device to D0? Usually this will already be done, but I would check anyway.

When you read the register, using:

Code:

temp = (*(usbaddr+0x00));

does this read a dword or a byte? I don't remember for sure but does the EHCI require dword reads and writes only? Note, I would assume you have "usbaddr" as a byte pointer since you +0x00 to it. If you change it to a dword pointer, watch yourself when adding to it. usbaddr+0x10 may not be what you think it would be depending on how you code it.

Ben

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

Thanks,Ben

Since you have said that xhci is more easier than ehci ,how can i config xhci in qemu command line?

below is ehci:

Quote:

-usb -device usb-ehci,id=ehci -device usb-host,bus=ehci.0,vendorid=8086

Ray

BenLunt · **Posted:** Wed Nov 02, 2016 9:15 am

I haven't tried it yet, but I believe the correct command line option is

Code:

-device nec-usb-xhci,id=xhci

and then you use xhci.0 instead of ehci.0.

iansjack · **Posted:** Wed Nov 02, 2016 9:26 am

You may find this document of use: http://git.qemu.org/?p=qemu.git;a=blob_ ... xt;hb=HEAD

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

Hi,ben.
When i read the 0x34 of the pci configuration space of xhci,i got 0x90 for offset of the capablity list start offset in pci,
then i read the offset 0x90 i received the value of 0x7011,what does it mean?And how can i compute the power management register offset?
the power management reg is in pci config space or other place?I really confused for fysos usb book on xhci.
And ben ,Can you give me a valid email ,then i can discussion some issues?

Ray

BenLunt · **Posted:** Fri Nov 04, 2016 10:38 am

This is explained on page 9-8 of my book. If you read in the word 0x7011, then you have an ID value of 0x11 and a next offset of 0x70. An ID value of 0x11 (17d) is the Extended Message Interrupt ID, not the power management one you are looking for. Therefore, take the "next offset" field to get the next ID. Unlike the xHCI extended caps list, the next offset is the actual offset. Therefore, read in the word at offset 0x70. Continue to do this until you find the Power Management ID or the end of list.

The figures and tables in chapter 9, especially page 9-8 represent the table of extended capabilities for the xHCI and is found by the offset within the HCCPARAMS1 register.

Also, with the list in the PCI config space, offset 0x34 is only valid if bit 4 is set in the status register.

The PCI Power Management Specification sheet, chapter 3, describes this in detail, as far as the PCI is concerned. The xHCI Power management, the field and linked list pointed to by the HCCPARAMS1 register, is explained in the xHCI specification.

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

In the offset 0x70 is 0x00880005,that means id 5 offset is 0x00 ,it must be an end. there seemly is no power management register.

What should I do?Mabybe offset 0x70 is wrong

Code:

0x34--0x90
0x90--0xf7011
0x70--0x880005

BenLunt · **Posted:** Fri Nov 04, 2016 9:21 pm

No, not necessarily. On the xHCI, the power management may be pointed to by the HCCPARMS1 register as I mentioned earlier. If it is, it is within the xHCI register base instead.

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

In this case of no Power Management register,how can i set it to start the mmio base mode for xhci?

If power management reg is in HCCPARMS1 register ,before i start the mmio ,i can not read HCCPARMS1 register ,am i right?

And i should set power management for xhci to enable the mmio base read and write.

Raymond · **Joined:** Thu Jun 09, 2016 4:39 am **Posts:** 68

Where are you ben?I am seriously waiting for your reply.The power management is very important.

OSDev.org

USB EHCI memory mapped I/O how to use

Who is online