Expose IOMMU to VM guest to support SR-IOV/PCI passthrough
Posted: Mon Jun 09, 2025 6:02 am
Hello,
I need to run a networking software from Cisco XRd vRouter within a qemu/kvm VM on my Linux machine.
The requirements specify that Hypervisor/VMM must expose IOMMU support to the guest in order to support SR-IOV/PCI passthrough. However I'm having trouble with this...
XRd vRouter runs as docker container within the guest Linux OS. My understanding is that, from the guest viewpoint, Hypervisor's emulated devices and SR-IOV/PCI passthrough devices are actually indistinguishable. For instance when guest OS performs PCI bus enumeration it retrives the relevant PCI device B/D/F configuration space entries in both cases. It is actually up to the Hypervisor (i.e. qemu) to emulate PCI devices' registers for emulated devices.
Then, for SR-IOV/PCI passthrough devices, the Hypervisor (qemu/kvm) must configure logical processors' hardware IOMMU to remap devices DMA initiated transactions' target GIOVAs to the relevant host machine addresses (HPAs). Note that the guest itself doesn't use IOMMU at all therefore actually target GIOVAs = target GPAs in this case (i.e. Intel scalable-mode PASID is configured to use only one stage of address translation).
Hence the question: why the requirement to expose IOMMU support to the guest to support SR-IOV/PCI passthrough ?
Thanks a lot.
I need to run a networking software from Cisco XRd vRouter within a qemu/kvm VM on my Linux machine.
The requirements specify that Hypervisor/VMM must expose IOMMU support to the guest in order to support SR-IOV/PCI passthrough. However I'm having trouble with this...
XRd vRouter runs as docker container within the guest Linux OS. My understanding is that, from the guest viewpoint, Hypervisor's emulated devices and SR-IOV/PCI passthrough devices are actually indistinguishable. For instance when guest OS performs PCI bus enumeration it retrives the relevant PCI device B/D/F configuration space entries in both cases. It is actually up to the Hypervisor (i.e. qemu) to emulate PCI devices' registers for emulated devices.
Then, for SR-IOV/PCI passthrough devices, the Hypervisor (qemu/kvm) must configure logical processors' hardware IOMMU to remap devices DMA initiated transactions' target GIOVAs to the relevant host machine addresses (HPAs). Note that the guest itself doesn't use IOMMU at all therefore actually target GIOVAs = target GPAs in this case (i.e. Intel scalable-mode PASID is configured to use only one stage of address translation).
Hence the question: why the requirement to expose IOMMU support to the guest to support SR-IOV/PCI passthrough ?
Thanks a lot.