OSDev.org

The Place to Start for Operating System Developers
It is currently Thu Mar 28, 2024 6:20 am

All times are UTC - 6 hours




Post new topic This topic is locked, you cannot edit posts or make further replies.  [ 7 posts ] 
Author Message
 Post subject: DI not supported (See Why Combusters shame is always hidden)
PostPosted: Sat Oct 04, 2014 2:30 am 
Combuster wrote:
Thinking that you know while you don't know is a disease.

Pretending that you know even more is much worse.
Combuster wrote:
Go read the manual since this is wrong and very, very basic assembly.

Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).


Top
  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sat Oct 04, 2014 3:32 am 
Offline
Member
Member

Joined: Sat Nov 21, 2009 5:11 pm
Posts: 852
embryo wrote:
Combuster wrote:
Thinking that you know while you don't know is a disease.

Pretending that you know even more is much worse.
Combuster wrote:
Go read the manual since this is wrong and very, very basic assembly.

Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).

In that case, you should go to the store and get it replaced or your money back. Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.


Top
 Profile  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sun Oct 05, 2014 2:34 am 
Gigasoft wrote:
Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.

Have you read the manual carefully enough? But it seems even my post was skipped.


Top
  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sun Oct 05, 2014 2:43 am 
Offline
Member
Member
User avatar

Joined: Wed Oct 18, 2006 3:45 am
Posts: 9301
Location: On the balcony, where I can actually keep 1½m distance
embryo wrote:
Gigasoft wrote:
Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.

Have you read the manual carefully enough? But it seems even my post was skipped.
Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.

_________________
"Certainly avoid yourself. He is a newbie and might not realize it. You'll hate his code deeply a few years down the road." - Sortie
[ My OS ] [ VDisk/SFS ]


Top
 Profile  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sun Oct 05, 2014 3:11 am 
Combuster wrote:
Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.

Well, if Combuster gives up on finding relevant information I am glad to present it :)
Intel® 64 and IA-32 Architectures Software Developer’s Manual wrote:
3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a static value or through an address
computation made up of one or more of the following components:
• Displacement — An 8-bit, 16-bit, or 32-bit value.
• Base — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Index — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Scale factor —A value of 2, 4, or 8 that is multiplied by the index value.

The important part here is about Base and Index registers.


Top
  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sun Oct 05, 2014 3:28 am 
Offline
Member
Member

Joined: Wed Jan 08, 2014 8:41 am
Posts: 100
Location: Moscow, Russia
embryo wrote:
The important part here is about Base and Index registers.

The address size override prefix, 0x67, still works in 64-bit mode, allowing 16-bit bases and indexes.

EDIT: see table 1-3 in section 1.2.3 and table A-33 in appendix A in AMD Manual volume 3.


Top
 Profile  
 
 Post subject: Re: Introduction of nop 'fixes' rep movsb
PostPosted: Sun Oct 05, 2014 3:48 am 
Icee wrote:
cf. table 1-3 in section 1.2.3 and table A-33 in appendix A in AMD Manual volume 3.

Yet another hack, mentioned somewhere deep enough to be missed by most part of developers. Should we trust a yet another hack? Or is it better just to read it in simple words and use 32 or 64 bit registers?

But may be it is the question that Intel should answer.


Top
  
 
Display posts from previous:  Sort by  
Post new topic This topic is locked, you cannot edit posts or make further replies.  [ 7 posts ] 

All times are UTC - 6 hours


Who is online

Users browsing this forum: No registered users and 19 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to:  
Powered by phpBB © 2000, 2002, 2005, 2007 phpBB Group