If you still don't understand the multi-level nature of page table hierarchy in x86, refer to this section on wikipedia: (
https://en.wikipedia.org/wiki/Page_table#Multilevel_page_table).
Say, for example, your program is going to access the logical address 0x00002ABC. Several calculations are handled first:
page index = 0x00002ABC>>12 = 0x00002.
DIR PAGE ENTRY INDX = 0x00002/1024 = 0
PG TBL ENTRY INDX = 0x00002%1024 = 2
Next, the i386 CPU turns attention to your page directory (which is stored at 0xD000 in your case). Entry i of the page directory gives us information about the page tables that covers the (i+1)th 4MB of logical memory. According to the calculations above, we should look at DIR PAGE ENTRY INDX 0, which contains 0x0000F007 in your case. This means that the page table that covers this part of memory exists at physical address 0x0000F000.
Finally, the i386 loads the addressed page table in TLB (if not loaded) and reads the desired PG TBL ENTRY from it. In our case, we want the entry that is located at index 2. This page table entry stores the value of 0x00002005, indicating that the physical address of the required page is 0x00002000, and hence the translation process would yield 0x00002ABC.
So, as you can see, translation is done over multiple stages. You can refer to section 5.2 of the manual for more illustration. The figures shall help you.
Best of luck!