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 Post subject: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 1:41 am 
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Joined: Sun Apr 23, 2017 4:28 am
Posts: 14
Hello.
I'm trying to implement backbuffer and got problem with the apic error in bochs. The problem is when I initialize the backbuffer array with zeros. However I commented out most of the code in backbuffer initialization function and it turns out that even empty loop causes this error.
Code:
#include <stdint.h>
#include "../graphics/draw_pixel.h"
#include "../libc/hex_to_string.h"
#include "../libc/mem.h"
#include "../graphics/draw_string.h"
#include "../libc/function.h"
#include "../libc/strings.h"

uint32_t* back_buffer;

void initialize_back_buffer(){
   uint32_t numberOfBytes = best_video_mode.height*best_video_mode.width*best_video_mode.bpp/8;
   uint32_t  values[numberOfBytes];
   uint32_t  i=0;

   for (i=0; i<numberOfBytes; i++){

   }


   UNUSED(values);
   UNUSED(numberOfBytes);
}

void write_to_back_buffer(uint32_t* values, int startPosition, int length){

   int i =0;
   print_string("back buffer check");

   UNUSED(values);
   UNUSED(startPosition);
   UNUSED(length);
   UNUSED(i);
}


Removed commented out code for readability. The funny thing is when I replace numberOfBytes in the loop with, say 8000, the error doesn't occur. However value 10000 causes the error.


Bochs error log:
Code:
00000000000i[      ] Bochs x86 Emulator 2.6.8
00000000000i[      ]   Built from SVN snapshot on May 3, 2015
00000000000i[      ] Compiled on May  3 2015 at 10:02:21
00000000000i[      ] System configuration
00000000000i[      ]   processors: 1 (cores=1, HT threads=1)
00000000000i[      ]   A20 line support: yes
00000000000i[      ]   load configurable MSRs from file "msrs.def"
00000000000i[      ] IPS is set to 50000000
00000000000i[      ] CPU configuration
00000000000i[      ]   SMP support: no
00000000000i[      ]   Using pre-defined CPU configuration: core2_penryn_t9600
00000000000i[      ] Optimization configuration
00000000000i[      ]   RepeatSpeedups support: yes
00000000000i[      ]   Fast function calls: yes
00000000000i[      ]   Handlers Chaining speedups: yes
00000000000i[      ] Devices configuration
00000000000i[      ]   NE2000 support: yes
00000000000i[      ]   PCI support: yes, enabled=yes
00000000000i[      ]   SB16 support: yes
00000000000i[      ]   USB support: yes
00000000000i[      ]   VGA extension support: vbe cirrus voodoo
00000000000i[MEM0  ] allocated memory at 04C50020. after alignment, vector=04C51000
00000000000i[MEM0  ] 512,00MB
00000000000i[MEM0  ] mem block size = 0x00100000, blocks=512
00000000000i[MEM0  ] rom at 0xfffe0000/131072 ('C:\Program Files (x86)\Bochs-2.6.8/BIOS-bochs-latest')
00000000000i[SNDLOW] Sound lowlevel module 'win' initialized
00000000000i[SNDCTL] Installed sound driver 'win' at index #0
00000000000i[PLUGIN] init_dev of 'pci' plugin device by virtual method
00000000000i[DEV   ] i440FX PMC present at device 0, function 0
00000000000i[PLUGIN] init_dev of 'pci2isa' plugin device by virtual method
00000000000i[DEV   ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
00000000000i[PLUGIN] init_dev of 'cmos' plugin device by virtual method
00000000000i[CMOS  ] Using local time for initial clock
00000000000i[CMOS  ] Setting initial clock to: Fri May 12 09:30:48 2017 (time0=1494574248)
00000000000i[PLUGIN] init_dev of 'dma' plugin device by virtual method
00000000000i[DMA   ] channel 4 used by cascade
00000000000i[PLUGIN] init_dev of 'pic' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'pit' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'vga' plugin device by virtual method
00000000000i[MEM0  ] Register memory access handlers: 0x0000000a0000 - 0x0000000bffff
00000000000i[VGA   ] interval=200000, mode=realtime
00000000000i[MEM0  ] Register memory access handlers: 0x0000e0000000 - 0x0000e0ffffff
00000000000i[BXVGA ] VBE Bochs Display Extension Enabled
00000000000i[WINGUI] Desktop Window dimensions: 1366 x 768
00000000000i[WINGUI] Number of Mouse Buttons = 5
00000000000i[WINGUI] IME disabled
00000000000i[MEM0  ] rom at 0xc0000/41472 ('C:\Program Files (x86)\Bochs-2.6.8/VGABIOS-lgpl-latest')
00000000000i[PLUGIN] init_dev of 'floppy' plugin device by virtual method
00000000000i[DMA   ] channel 2 used by Floppy Drive
00000000000i[FLOPPY] fd0: 'C:\cygwin64\home\Viruss\cygwin\myos\os-image.img' ro=0, h=2,t=80,spt=18
00000000000i[PLUGIN] init_dev of 'acpi' plugin device by virtual method
00000000000i[DEV   ] ACPI Controller present at device 1, function 3
00000000000i[PLUGIN] init_dev of 'ioapic' plugin device by virtual method
00000000000i[IOAPIC] initializing I/O APIC
00000000000i[MEM0  ] Register memory access handlers: 0x0000fec00000 - 0x0000fec00fff
00000000000i[IOAPIC] IOAPIC enabled (base address = 0xfec00000)
00000000000i[PLUGIN] init_dev of 'keyboard' plugin device by virtual method
00000000000i[KBD   ] will paste characters every 400 keyboard ticks
00000000000i[PLUGIN] init_dev of 'harddrv' plugin device by virtual method
00000000000i[HD    ] Using boot sequence floppy, none, none
00000000000i[HD    ] Floppy boot signature check is enabled
00000000000i[PLUGIN] init_dev of 'pci_ide' plugin device by virtual method
00000000000i[DEV   ] PIIX3 PCI IDE controller present at device 1, function 1
00000000000i[PLUGIN] init_dev of 'unmapped' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'biosdev' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'speaker' plugin device by virtual method
00000000000i[PCSPK ] Using lowlevel sound support for output
00000000000i[PLUGIN] init_dev of 'extfpuirq' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'parallel' plugin device by virtual method
00000000000i[PAR   ] parallel port 1 at 0x0378 irq 7
00000000000i[PLUGIN] init_dev of 'serial' plugin device by virtual method
00000000000i[SER   ] com1 at 0x03f8 irq 4 (mode: null)
00000000000i[PLUGIN] init_dev of 'gameport' plugin device by virtual method
00000000000i[PLUGIN] init_dev of 'usb_uhci' plugin device by virtual method
00000000000i[DEV   ] USB UHCI present at device 1, function 2
00000000000i[UHCI  ] USB UHCI initialized
00000000000i[PLUGIN] register state of 'pci' plugin device by virtual method
00000000000i[PLUGIN] register state of 'pci2isa' plugin device by virtual method
00000000000i[PLUGIN] register state of 'cmos' plugin device by virtual method
00000000000i[PLUGIN] register state of 'dma' plugin device by virtual method
00000000000i[PLUGIN] register state of 'pic' plugin device by virtual method
00000000000i[PLUGIN] register state of 'pit' plugin device by virtual method
00000000000i[PLUGIN] register state of 'vga' plugin device by virtual method
00000000000i[PLUGIN] register state of 'floppy' plugin device by virtual method
00000000000i[PLUGIN] register state of 'unmapped' plugin device by virtual method
00000000000i[PLUGIN] register state of 'biosdev' plugin device by virtual method
00000000000i[PLUGIN] register state of 'speaker' plugin device by virtual method
00000000000i[PLUGIN] register state of 'extfpuirq' plugin device by virtual method
00000000000i[PLUGIN] register state of 'parallel' plugin device by virtual method
00000000000i[PLUGIN] register state of 'serial' plugin device by virtual method
00000000000i[PLUGIN] register state of 'gameport' plugin device by virtual method
00000000000i[PLUGIN] register state of 'usb_uhci' plugin device by virtual method
00000000000i[PLUGIN] register state of 'acpi' plugin device by virtual method
00000000000i[PLUGIN] register state of 'ioapic' plugin device by virtual method
00000000000i[PLUGIN] register state of 'keyboard' plugin device by virtual method
00000000000i[PLUGIN] register state of 'harddrv' plugin device by virtual method
00000000000i[PLUGIN] register state of 'pci_ide' plugin device by virtual method
00000000000i[SYS   ] bx_pc_system_c::Reset(HARDWARE) called
00000000000i[CPU0  ] cpu hardware reset
00000000000i[APIC0 ] allocate APIC id=0 (MMIO enabled) to 0x0000fee00000
00000000000i[CPU0  ] CPUID[0x00000000]: 0000000d 756e6547 6c65746e 49656e69
00000000000i[CPU0  ] CPUID[0x00000001]: 0001067a 00010800 0408e3fd bfebfbff
00000000000i[CPU0  ] CPUID[0x00000002]: 05b0b101 005657f0 00000000 2cb4304e
00000000000i[CPU0  ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] CPUID[0x00000004]: 04000121 01c0003f 0000003f 00000001
00000000000i[CPU0  ] CPUID[0x00000005]: 00000040 00000040 00000003 03122220
00000000000i[CPU0  ] CPUID[0x00000006]: 00000003 00000002 00000003 00000000
00000000000i[CPU0  ] CPUID[0x00000007]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] CPUID[0x00000008]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] CPUID[0x00000009]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] WARNING: Architectural Performance Monitoring is not implemented
00000000000i[CPU0  ] CPUID[0x0000000a]: 07280202 00000000 00000000 00000503
00000000000i[CPU0  ] CPUID[0x0000000b]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] CPUID[0x0000000c]: 00000000 00000000 00000000 00000000
00000000000i[CPU0  ] CPUID[0x0000000d]: 00000003 00000240 00000240 00000000
00000000000i[PLUGIN] reset of 'pci' plugin device by virtual method
00000000000i[PLUGIN] reset of 'pci2isa' plugin device by virtual method
00000000000i[PLUGIN] reset of 'cmos' plugin device by virtual method
00000000000i[PLUGIN] reset of 'dma' plugin device by virtual method
00000000000i[PLUGIN] reset of 'pic' plugin device by virtual method
00000000000i[PLUGIN] reset of 'pit' plugin device by virtual method
00000000000i[PLUGIN] reset of 'vga' plugin device by virtual method
00000000000i[PLUGIN] reset of 'floppy' plugin device by virtual method
00000000000i[PLUGIN] reset of 'acpi' plugin device by virtual method
00000000000i[PLUGIN] reset of 'ioapic' plugin device by virtual method
00000000000i[PLUGIN] reset of 'keyboard' plugin device by virtual method
00000000000i[PLUGIN] reset of 'harddrv' plugin device by virtual method
00000000000i[PLUGIN] reset of 'pci_ide' plugin device by virtual method
00000000000i[PLUGIN] reset of 'unmapped' plugin device by virtual method
00000000000i[PLUGIN] reset of 'biosdev' plugin device by virtual method
00000000000i[PLUGIN] reset of 'speaker' plugin device by virtual method
00000000000i[PLUGIN] reset of 'extfpuirq' plugin device by virtual method
00000000000i[PLUGIN] reset of 'parallel' plugin device by virtual method
00000000000i[PLUGIN] reset of 'serial' plugin device by virtual method
00000000000i[PLUGIN] reset of 'gameport' plugin device by virtual method
00000000000i[PLUGIN] reset of 'usb_uhci' plugin device by virtual method
00000004634i[BIOS  ] $Revision: 12579 $ $Date: 2014-12-26 11:31:39 +0100 (Fr, 26. Dez 2014) $
00000337532i[KBD   ] reset-disable command received
00000363216i[BIOS  ] Starting rombios32
00000363659i[BIOS  ] Shutdown flag 0
00000364231i[BIOS  ] ram_size=0x20000000
00000364704i[BIOS  ] ram_end=512MB
00006537859i[BIOS  ] Found 1 cpu(s)
00006551923i[BIOS  ] bios_table_addr: 0x000fa498 end=0x000fcc00
00006875001i[PCI   ] i440FX PMC write to PAM register 59 (TLB Flush)
00007207841i[P2ISA ] PCI IRQ routing: PIRQA# set to 0x0b
00007207867i[P2ISA ] PCI IRQ routing: PIRQB# set to 0x09
00007207867i[P2ISA ] PCI IRQ routing: PIRQC# set to 0x0b
00007207867i[P2ISA ] PCI IRQ routing: PIRQD# set to 0x09
00007207867i[P2ISA ] write: ELCR2 = 0x0a
00007208554i[BIOS  ] PIIX3/PIIX4 init: elcr=00 0a
00007216072i[BIOS  ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
00007218351i[BIOS  ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
00007220469i[BIOS  ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
00007221016i[PIDE  ] new BM-DMA address: 0xc000
00007221555i[BIOS  ] region 4: 0x0000c000
00007223321i[BIOS  ] PCI: bus=0 devfn=0x0a: vendor_id=0x8086 device_id=0x7020 class=0x0c03
00007223679i[UHCI  ] new base address: 0xc020
00007224382i[BIOS  ] region 4: 0x0000c020
00007224582i[UHCI  ] new irq line = 9
00007226157i[BIOS  ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
00007226709i[ACPI  ] new irq line = 11
00007226743i[ACPI  ] new irq line = 9
00007226762i[ACPI  ] new PM base address: 0xb000
00007226762i[ACPI  ] new SM base address: 0xb100
00007226794i[PCI   ] setting SMRAM control register to 0x4a
00007390912i[CPU0  ] Enter to System Management Mode
00007390912i[CPU0  ] enter_system_management_mode: temporary disable VMX while in SMM mode
00007390916i[CPU0  ] RSM: Resuming from System Management Mode
00007554938i[PCI   ] setting SMRAM control register to 0x0a
00007569544i[BIOS  ] MP table addr=0x000fa570 MPC table addr=0x000fa4a0 size=0xc8
00007571526i[BIOS  ] SMBIOS table addr=0x000fa580
00007573506i[BIOS  ] ACPI tables: RSDP addr=0x000fa6a0 ACPI DATA addr=0x1fff0000 size=0xf72
00007576925i[BIOS  ] Firmware waking vector 0x1fff00cc
00007578872i[PCI   ] i440FX PMC write to PAM register 59 (TLB Flush)
00007579453i[BIOS  ] bios_table_cur_addr: 0x000fa6c4
00007707210i[VBIOS ] VGABios $Id: vgabios.c,v 1.76 2013/02/10 08:07:03 vruppert Exp $

00007707295i[BXVGA ] VBE known Display Interface b0c0
00007707314i[BXVGA ] VBE known Display Interface b0c5
00007710238i[VBIOS ] VBE Bios $Id: vbe.c,v 1.65 2014/07/08 18:02:25 vruppert Exp $
00007781200i[WINGUI] dimension update x=720 y=400 fontheight=16 fontwidth=9 bpp=8
00158719524i[BIOS  ] Booting from 0000:7c00
00173462610i[FLOPPY] partial read() on floppy image returns 384/512
00174018160i[FLOPPY] read() on floppy image returns 0
00174573715i[FLOPPY] read() on floppy image returns 0
00175129270i[FLOPPY] read() on floppy image returns 0
00175684825i[FLOPPY] read() on floppy image returns 0
00176240378i[FLOPPY] read() on floppy image returns 0
00176795928i[FLOPPY] read() on floppy image returns 0
00177351483i[FLOPPY] read() on floppy image returns 0
00177907038i[FLOPPY] read() on floppy image returns 0
00178462593i[FLOPPY] read() on floppy image returns 0
00179018146i[FLOPPY] read() on floppy image returns 0
00179573696i[FLOPPY] read() on floppy image returns 0
00180129251i[FLOPPY] read() on floppy image returns 0
00180684806i[FLOPPY] read() on floppy image returns 0
00181240361i[FLOPPY] read() on floppy image returns 0
00181795914i[FLOPPY] read() on floppy image returns 0
00183034421i[BXVGA ] VBE set bpp (32)
00183034445i[BXVGA ] VBE set xres (1280)
00183034482i[BXVGA ] VBE set yres (768)
00183034516i[BXVGA ] VBE enabling x 1280, y 768, bpp 32, 3932160 bytes visible
00183034516i[WINGUI] dimension update x=1280 y=768 fontheight=0 fontwidth=0 bpp=32
00183062538i[CPU0  ] LOCK prefix unallowed (op1=0x53, modrm=0x00)
00183062539i[CPU0  ] LOCK prefix unallowed (op1=0x53, modrm=0x00)
00184168883i[APIC0 ] warning: misaligned APIC access. addr=0x0000fee00fe8
00184168883p[APIC0 ] >>PANIC<< APIC write at unaligned address 0x0000fee00fe8
00184168883i[CPU0  ] CPU is in protected mode (active)
00184168883i[CPU0  ] CS.mode = 32 bit
00184168883i[CPU0  ] SS.mode = 32 bit
00184168883i[CPU0  ] EFER   = 0x00000000
00184168883i[CPU0  ] | EAX=00000010  EBX=00000010  ECX=0008ffcc  EDX=0000ffff
00184168883i[CPU0  ] | ESP=fee00fec  EBP=fee01010  ESI=000e133d  EDI=00000000
00184168883i[CPU0  ] | IOPL=0 id vip vif ac vm rf nt of df if tf SF zf AF pf cf
00184168883i[CPU0  ] | SEG sltr(index|ti|rpl)     base    limit G D
00184168883i[CPU0  ] |  CS:0008( 0001| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] |  DS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] |  SS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] |  ES:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] |  FS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] |  GS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00184168883i[CPU0  ] | EIP=0000227d (00002278)
00184168883i[CPU0  ] | CR0=0x60000011 CR2=0x00000000
00184168883i[CPU0  ] | CR3=0x00000000 CR4=0x00000000
00184168883i[CPU0  ] 0x0000000000002278>> push 0x00003116 : 6816310000
00184168883i[CMOS  ] Last time is 1494574251 (Fri May 12 09:30:51 2017)
00184168883i[      ] restoring default signal behavior
00184168883i[SIM   ] quit_sim called with exit code 1




Here's the main kernel function:
Code:
#include "../cpu/isr.h"
#include "../cpu/timer.h"
#include "../cpu/types.h"
#include "../drivers/keyboard.h"
#include "../libc/strings.h"
#include "../libc/function.h"
#include "../libc/hex_to_string.h"
#include "../graphics/draw_pixel.h"
#include "../graphics/draw_string.h"
#include "../graphics/mouse_cursor.h"
#include "../graphics/back_buffer.h"


void start() {

   isr_install();
   asm volatile("sti");
   init_timer(50); //even tried to comment out this and next line, with no success
   init_keyboard();
   initialize_back_buffer();

}

void user_input(char *input) {
    if (strcmp(input, "END") == 0) {
       print_string("Stopping the CPU. Bye!\n");
        __asm__ ("hlt");
    }
    print_string("You said: ");
    print_string(input);
    println("");
}


Here's the interrupt.asm modified since my last post
Code:
[extern isr_handler]
[extern irq_handler]
; Defined in isr.c


; Common ISR code
isr_common_stub:
    ; 1. Save CPU state
   pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
   mov ax, ds ; Lower 16-bits of eax = ds.
   push eax ; save the data segment descriptor
   mov ax, 0x10  ; kernel data segment descriptor
   mov ds, ax
   mov es, ax
   mov fs, ax
   mov gs, ax

   push esp
   cld
    ; 2. Call C handler
   call isr_handler

    ; 3. Restore state
   pop eax
   pop eax
   mov ds, ax
   mov es, ax
   mov fs, ax
   mov gs, ax
   popa
   add esp, 8 ; Cleans up the pushed error code and pushed ISR number
   iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP

; Common IRQ code. Identical to ISR code except for the 'call'
; and the 'pop ebx'
irq_common_stub:
    pusha
    mov ax, ds
    push eax
    mov ax, 0x10
    mov ds, ax
    mov es, ax
    mov fs, ax
    mov gs, ax
    push esp
    cld

    call irq_handler ; Different than the ISR code
    pop ebx  ; Different than the ISR code
    pop ebx
    mov ds, bx
    mov es, bx
    mov fs, bx
    mov gs, bx
    popa
    add esp, 8
    iret

; We don't get information about which interrupt was caller
; when the handler is run, so we will need to have a different handler
; for every interrupt.
; Furthermore, some interrupts push an error code onto the stack but others
; don't, so we will push a dummy error code for those which don't, so that
; we have a consistent stack for all of them.

; First make the ISRs global
global isr0
global isr1
global isr2
global isr3
global isr4
global isr5
global isr6
global isr7
global isr8
global isr9
global isr10
global isr11
global isr12
global isr13
global isr14
global isr15
global isr16
global isr17
global isr18
global isr19
global isr20
global isr21
global isr22
global isr23
global isr24
global isr25
global isr26
global isr27
global isr28
global isr29
global isr30
global isr31

global irq0
global irq1
global irq2
global irq3
global irq4
global irq5
global irq6
global irq7
global irq8
global irq9
global irq10
global irq11
global irq12
global irq13
global irq14
global irq15

; 0: Divide By Zero Exception
isr0:

    push byte 0
    push byte 0
    jmp isr_common_stub

; 1: Debug Exception
isr1:

    push byte 0
    push byte 1
    jmp isr_common_stub

; 2: Non Maskable Interrupt Exception
isr2:

    push byte 0
    push byte 2
    jmp isr_common_stub

; 3: Int 3 Exception
isr3:

    push byte 0
    push byte 3
    jmp isr_common_stub

; 4: INTO Exception
isr4:

    push byte 0
    push byte 4
    jmp isr_common_stub

; 5: Out of Bounds Exception
isr5:

    push byte 0
    push byte 5
    jmp isr_common_stub

; 6: Invalid Opcode Exception
isr6:

    push byte 0
    push byte 6
    jmp isr_common_stub

; 7: Coprocessor Not Available Exception
isr7:

    push byte 0
    push byte 7
    jmp isr_common_stub

; 8: Double Fault Exception (With Error Code!)
isr8:

    push byte 8
    jmp isr_common_stub

; 9: Coprocessor Segment Overrun Exception
isr9:

    push byte 0
    push byte 9
    jmp isr_common_stub

; 10: Bad TSS Exception (With Error Code!)
isr10:

    push byte 10
    jmp isr_common_stub

; 11: Segment Not Present Exception (With Error Code!)
isr11:

    push byte 11
    jmp isr_common_stub

; 12: Stack Fault Exception (With Error Code!)
isr12:

    push byte 12
    jmp isr_common_stub

; 13: General Protection Fault Exception (With Error Code!)
isr13:

    push byte 13
    jmp isr_common_stub

; 14: Page Fault Exception (With Error Code!)
isr14:

    push byte 14
    jmp isr_common_stub

; 15: Reserved Exception
isr15:

    push byte 0
    push byte 15
    jmp isr_common_stub

; 16: Floating Point Exception
isr16:

    push byte 0
    push byte 16
    jmp isr_common_stub

; 17: Alignment Check Exception
isr17:

    push byte 0
    push byte 17
    jmp isr_common_stub

; 18: Machine Check Exception
isr18:

    push byte 0
    push byte 18
    jmp isr_common_stub

; 19: Reserved
isr19:

    push byte 0
    push byte 19
    jmp isr_common_stub

; 20: Reserved
isr20:

    push byte 0
    push byte 20
    jmp isr_common_stub

; 21: Reserved
isr21:

    push byte 0
    push byte 21
    jmp isr_common_stub

; 22: Reserved
isr22:

    push byte 0
    push byte 22
    jmp isr_common_stub

; 23: Reserved
isr23:

    push byte 0
    push byte 23
    jmp isr_common_stub

; 24: Reserved
isr24:

    push byte 0
    push byte 24
    jmp isr_common_stub

; 25: Reserved
isr25:

    push byte 0
    push byte 25
    jmp isr_common_stub

; 26: Reserved
isr26:

    push byte 0
    push byte 26
    jmp isr_common_stub

; 27: Reserved
isr27:

    push byte 0
    push byte 27
    jmp isr_common_stub

; 28: Reserved
isr28:

    push byte 0
    push byte 28
    jmp isr_common_stub

; 29: Reserved
isr29:

    push byte 0
    push byte 29
    jmp isr_common_stub

; 30: Reserved
isr30:

    push byte 0
    push byte 30
    jmp isr_common_stub

; 31: Reserved
isr31:

    push byte 0
    push byte 31
    jmp isr_common_stub

; IRQ handlers
irq0:

   push byte 0
   push byte 32
   jmp irq_common_stub

irq1:

   push byte 1
   push byte 33
   jmp irq_common_stub

irq2:

   push byte 2
   push byte 34
   jmp irq_common_stub

irq3:

   push byte 3
   push byte 35
   jmp irq_common_stub

irq4:

   push byte 4
   push byte 36
   jmp irq_common_stub

irq5:

   push byte 5
   push byte 37
   jmp irq_common_stub

irq6:

   push byte 6
   push byte 38
   jmp irq_common_stub

irq7:

   push byte 7
   push byte 39
   jmp irq_common_stub

irq8:

   push byte 8
   push byte 40
   jmp irq_common_stub

irq9:

   push byte 9
   push byte 41
   jmp irq_common_stub

irq10:

   push byte 10
   push byte 42
   jmp irq_common_stub

irq11:

   push byte 11
   push byte 43
   jmp irq_common_stub

irq12:

   push byte 12
   push byte 44
   jmp irq_common_stub

irq13:

   push byte 13
   push byte 45
   jmp irq_common_stub

irq14:

   push byte 14
   push byte 46
   jmp irq_common_stub

irq15:

   push byte 15
   push byte 47
   jmp irq_common_stub


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 5:31 am 
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You have a stack overflow there, in the values variable.


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 5:35 am 
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Posts: 384
Are you saying the below code causes the issue?
Code:
uint32_t* back_buffer;

void initialize_back_buffer(){
   uint32_t numberOfBytes = best_video_mode.height*best_video_mode.width*best_video_mode.bpp/8;
   uint32_t  values[numberOfBytes];
   uint32_t  i=0;

   for (i=0; i<numberOfBytes; i++){

   }


   UNUSED(values);
   UNUSED(numberOfBytes);
}


Or that because you have commented so much out (and removed) so that it doesn't cause the issue? Given that the above does nothing it seems odd to cause issues =)


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 6:37 am 
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Posts: 14
@LtG
Indeed, the code with empty for loop causes the error, but commenting out the for loop causes the error not occuring.
@Icee
Thanks, changing the "values" to static variable fixes the problem but my initial problem comes back: how to initialize the array with the size equal to some variable.
Guess that malloc function is unevitable then.


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 7:07 am 
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Posts: 384
viruss33 wrote:
Thanks, changing the "values" to static variable fixes the problem but my initial problem comes back: how to initialize the array with the size equal to some variable.
Guess that malloc function is unevitable then.


Two options:
- Reduce the amount of storage needed (lower resolution/bpp), which is probably not what you want.
- Make more storage available, ie. increase stack size.

This is your OS, you can do what you want =)

Not sure how you've built thing, but at some point you've allocated space for the stack, IIRC some of the barebones tutorials only allocate 16KiB, whereas 800x600x32 will require ~2MiB of storage, and 1920*1080*32 would require ~8MiB. If you allow large enough stack then stack is probably faster/better and means you don't need malloc (yet), but really the choice is up to you.

For example later you may want to have two buffers, one which is given to the graphics card so it can display it and the other where you are copying/modifying/composing stuff and then when you're done you switch the two buffers (so you don't have to copy them). In that case you don't want to use stack because once you exit the function where the variable is defined the variable gets release and the graphics card must not use it after that, but would anyway. The stack as such doesn't really get released but gets re-used by subsequent functions so they would trash the video data in the buffer while the graphics card may still be using it.

So, in long term you'll probably want two buffers large enough to hold all the data. For now probably the easiest is to make two global variables (file scope), that way you don't have to allocate them by hand (still no malloc needed) and they remain regardless of which function you are currently executing.

Eventually you'll want to replace them with malloc, the only problem that comes to mind with the global variables is that you have to decide their size at compile time, which means you have to allocate based on worst case (ie. 8MiB for 1920x1080) even if you're only using less of it (ie. 2MiB for 800x600)..

Note, with the two global statically allocated arrays you can easily change later to using malloc, so that would be what I would do if I had no malloc now..

Code:
// static is not required in any of these, but it does make it file scope so it can't be accessed from other files which helps with encapsulation
static uint32_t Buffer1[1920*1080];
static uint32_t Buffer2[1920*1080];

// These two buffers get swapped to point to Buffer1/2; that way you can always write to Back[x] knowing it won't cause issues and atomically swap Front and Back.
static uint32_t* Front = Buffer1;
static uint32_t* Back = Buffer2;


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 7:23 am 
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Posts: 100
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LtG wrote:
Given that the above does nothing it seems odd to cause issues =)

It does just enough to trash the stack. The stack allocated buffer, values, leads to rSP being decremented by an amount that makes it go to memory that does not belong to the stack. This by itself does not yet trigger the error. But then i, which is even further down the stack, gets initialized to 0, so an actual write to a bad address occurs.


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 Post subject: Re: APIC write at unaligned address.
PostPosted: Fri May 12, 2017 9:00 am 
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Posts: 1134
On-topic suggestion:
Please do not repeat my mistakes. I trashed my OS for 3 times because of that. Memory management is all, remember this.
Don't attempt to work on anything so complex without dealing with the core stuff first. I learned this the hard way.
Also take a look at Assembly macros. They will make your ISR code more readable and sustainable.

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