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[Solved] ATA DMA Multitasking https://forum.osdev.org/viewtopic.php?f=1&t=31418 |
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Author: | Agola [ Mon Mar 13, 2017 8:59 am ] |
Post subject: | [Solved] ATA DMA Multitasking |
Hi, finally I've completely finished my multitasking and scheduler code. It works fast, supports V8086 mode tasks and ring changes. Now, for ATA, can I do a new DMA read while other is working? I couldn't find anything about it in Busmaster DMA documentation. (Documentation is: http://www.osdever.net/downloads/docs/idems100.zip) Or should I wait a transfer to complete, then start a new one? In other words can I do more than two transfers same time / one is not completed yet? Or should I only do one transfer at a time, and wait transfer to finish with a semaphore, mutex, etc. If I can do more than two transfers same time, should I do anything special? Is running it as usual enough? Thanks in advance |
Author: | Brendan [ Mon Mar 13, 2017 10:53 am ] |
Post subject: | Re: ATA DMA Multitasking |
Hi, Agola wrote: Now, for ATA, can I do a new DMA read while other is working? I couldn't find anything about it in Busmaster DMA documentation. (Documentation is: http://www.osdever.net/downloads/docs/idems100.zip) That depends. Typically there are 2 ATA controllers (primary and secondary) that are considered "independent" (even though it's likely they're both part of the same chip), where each controller can have 2 drives (master and slave), and each controller has its own bus mastering. There are 4 cases:
Agola wrote: Or should I wait a transfer to complete, then start a new one? In other words can I do more than two transfers same time / one is not completed yet? Or should I only do one transfer at a time, and wait transfer to finish with a semaphore, mutex, etc. While one command is in progress you shouldn't touch any of the bus master's registers. This means that you can't/shouldn't add a second transfer after setting the "start/stop bus master" flag and before the IRQ occurs. Cheers, Brendan |
Author: | Agola [ Mon Mar 13, 2017 1:08 pm ] |
Post subject: | Re: ATA DMA Multitasking |
Brendan wrote: Hi, Agola wrote: Now, for ATA, can I do a new DMA read while other is working? I couldn't find anything about it in Busmaster DMA documentation. (Documentation is: http://www.osdever.net/downloads/docs/idems100.zip) That depends. Typically there are 2 ATA controllers (primary and secondary) that are considered "independent" (even though it's likely they're both part of the same chip), where each controller can have 2 drives (master and slave), and each controller has its own bus mastering. There are 4 cases:
Agola wrote: Or should I wait a transfer to complete, then start a new one? In other words can I do more than two transfers same time / one is not completed yet? Or should I only do one transfer at a time, and wait transfer to finish with a semaphore, mutex, etc. While one command is in progress you shouldn't touch any of the bus master's registers. This means that you can't/shouldn't add a second transfer after setting the "start/stop bus master" flag and before the IRQ occurs. Cheers, Brendan That was really clear. Thanks. |
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